MC74LCX652 Datasheet, PDF (2/9 Pages) Motorola, Inc – LOW-VOLTAGE CMOS OCTAL TRANSCEIVER/ REGISTERED TRANSCEIVER WITH DUAL ENABLE

MC74LCX652
CBA ¹
OEAB ³
21
OEBA
SBA ²²
SAB ²
CAB ²³
A0
Figure 2. Logic Diagram
C
Q
D
C
Q
D
B0
1 of 8 Channels
To 7 Other Channels
FUNCTION TABLE
OEAB OEBA
Inputs
CAB
CBA
SAB
SBA
Data Ports
An
Bn
Operating Mode
L
H
Input
Input
↑
↑
X
X
X
↑
↑
X
X
l
h
X
Isolation, Hold Storage
l
Store A and/or B Data
h
H
H
↑
Input
Output
X*
L
X
L
H
L
Real Time A Data to B Bus
H
H
X
X
QA
Stored A Data to B Bus
↑
X*
L
X
l
h
L
Real Time A Data to B Bus; Store A Data
H
H
X
L
H
QA
Clock A Data to B Bus; Store A Data
QA
L
L
Output
Input
X*
↑
X
L
L
H
L
Real Time B Data to A Bus
H
X
H
QB
X
Stored B Data to A Bus
X*
↑
X
L
L
H
l
Real Time B Data to A Bus; Store B Data
h
X
H
QB
QB
L
Clock B Data to A Bus; Store B Data
H
H
L
↑
Output
Output
↑
H
H
QB
QA
Stored A Data to B Bus,
Stored B Data to A Bus
H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; L = Low Voltage Level; l = Low Voltage Level One Setup
Time Prior to the Low–to–High Clock Transition; X = Don’t Care; ↑ = Low–to–High Clock Transition; ↑ = NOT Low–to–High Clock Transition; QA = A input storage register;
QB = B input storage register; * = The clocks are not internally gated with either the Output Enables or the Source Inputs. Therefore, data at the A or B ports may be
clocked into the storage registers, at any time. For ICC reasons, Do Not Float Inputs.
MOTOROLA
2
LCX DATA
BR1339 — REV 3