MC74LCX139 Datasheet, PDF (2/8 Pages) ON Semiconductor – Dual Low-Voltage CMOS 2-to-4 Decoder/Demultiplexer

MC74LCX139
Ea 1
A0a ²
A1a ³
Y0a ⁴
Y1a 5
Y2a 6
Y3a 7
GND 8
16 _VCC
15 _Eb
14 _A0b
13 _A1b
12 Y0b
11 _Y1b
10 Y2b
9 Y3b
A1a ³
A0a 2
Ea 1
A1b 13
A0b 14
Eb 15
Figure 1. Pin Assignment
X/Y
1
0
2
1
EN
2
3
4 Y0a
5 Y1a
6 Y2a
7 _Y3a
12 _Y0b
11 Y1b
10 Y2b
9 Y3b
A1a ³
A0a ²
Ea 1
A1b 13
A0b 14
Eb ¹⁵
DMUX
0
1
G
0
3
0
1
2
3
4 Y0a
5 Y1a
6 Y2a
7 _Y3a
12 _Y0b
11 Y1b
10 Y2b
9 Y3b
Figure 2. IEC Logic Diagram
PIN NAMES
Pins
A0n−A1n
En
Y0n−Y3n
Function
Address Inputs
Enable Inputs
Outputs
TRUTH TABLE
Inputs
E A1 A0
H
XX
L
LL
L
LH
L
HL
L
HH
Outputs
Y0 Y1 Y2 Y3
H HH H
L HH H
H LH H
H HL H
H HH L
H = High Voltage Level;
L = Low Voltage Level;
Z = High Impedance State
ADDRESS
INPUTS
A0a ²
A1a ³
Ea ¹
4 _Y0a
5 _Y1a
6 _Y2a
7 _Y3a
ACTIVE−LOW
OUTPUTS
ADDRESS A0b ¹⁴
INPUTS _A1b 13
12 _Y0b
11 _Y1b
10 _Y2b
9 _Y3b
ACTIVE−LOW
OUTPUTS
Eb ¹⁵
Figure 3. Logic Diagram
En
Y0
Y1
A0
Y2
Y3
A1
Figure 4. Expanded Logic Diagram
(1/2 of Device)
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