MC74LCX00DTR2G Datasheet, PDF (2/7 Pages) ON Semiconductor – Low-Voltage CMOS Quad 2-Input NAND Gate

MC74LCX00
V_CC A2 B2 O2 A3 B3 O3
14 13 12 11 10 9 8
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A0 B0 O0 A1 B1 O1 GND
Figure 1. Pinout: 14-lead (Top View)
1
A0
2
B0
4
A1
5
B1
13
A2
12
B2
10
A3
9
B3
3
O0
6
O1
11
O2
8
O3
Figure 2. Logic Diagram
PIN NAMES
Pins
An, Bn
On
Function
Data Inputs
Outputs
TRUTH TABLE
Inputs
An
Bn
L
L
L
H
H
L
H
H
H = High Voltage Level
L = Low Voltage Level
For I_CC reasons, DO NOT FLOAT Inputs
Outputs
On
H
H
H
L
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
V_CC
DC Supply Voltage
V_I
DC Input Voltage
V_O
DC Output Voltage
I_IK
DC Input Diode Current
I_OK
DC Output Diode Current
I_O
I_CC
I_GND
T_STG
MSL
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Moisture Sensitivity
−0.5 to +7.0
V
−0.5  V_I  +7.0
V
−0.5  V_O  V_CC + 0.5
Output in HIGH or LOW State (Note 1)
V
−50
V_I < GND
mA
−50
V_O < GND
mA
+50
V_O > V_CC
mA
50
mA
100
mA
100
mA
−65 to +150
C
Level 1
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. I_O absolute maximum rating must be observed.
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