MC74HC132A_13 Datasheet, PDF (2/9 Pages) ON Semiconductor – Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

MC74HC132A
A1 ¹
B1 ²
A2 ⁴
B2 ⁵
A3 ⁹
B3 ¹⁰
A4 ¹²
B4 ¹³
3
Y1
6
Y2
Y = AB
8
Y3
11
Y4
PIN 14 = V_CC
PIN 7 = GND
Figure 2. Logic Diagram
ORDERING INFORMATION
MC74HC132ANG
Device
Package
PDIP−14
(Pb−Free)
Shipping^†
25 / Tape & Ammo Box
MC74HC132ADG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74HC132ADR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
MC74HC132ADTG
TSSOP−14
(Pb−Free)
96 Units / Rail
MC74HC132ADTR2G
TSSOP−14
(Pb−Free)
2500 / Tape & Reel
NLV74HC132ADG*
SOIC−14
(Pb−Free)
55 Units / Rail
NLV74HC132ADR2G*
SOIC−14
(Pb−Free)
2500 / Tape & Reel
NLV74HC132ADTG*
TSSOP−14
(Pb−Free)
96 Units / Rail
NLV74HC132ADTR2G*
TSSOP−14
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
http://onsemi.com
2