MC74ACT377MEL Datasheet, PDF (2/12 Pages) ON Semiconductor – Octal D Flip-Flop with Clock Enable

MC74AC377, MC74ACT377
VCC O7 D7 D6 O6 O5 D5 D4 O4 CP
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
CE O0 D0 D1 O1 O2 D2 D3 O3 GND
Figure 1. Pinout: 20–Lead Packages Conductors
(Top View)
D0 D1 D2 D3 D4 D5 D6 D7
CP
CE
O0 O1 O2 O3 O4 O5 O6 O7
Figure 2. LOGIC SYMBOL
PIN NAMES
PIN
D0–D7
CE
Q0–Q7
CP
FUNCTION
Data Inputs
Clock Enable (Active LOW)
Data Outputs
Clock Pulse Input
MODE SELECT-FUNCTION TABLE
Operating Mode
Load ′1′
Inputs
CP CE Dn
LH
Load ′0′
LL
Hold (Do Nothing)
HX
XHX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
Outputs
Qn
H
L
No Change
No Change
D0
D1
D2
D3
D4
D5
D6
D7
CE
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
CP
O0
O1
O2
O3
O4
O5
O6
O7
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Figure 3. LOGIC DIAGRAM
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