MC14503B_11 Datasheet, PDF (2/7 Pages) ON Semiconductor – Hex Non-Inverting 3-State Buffer

PIN ASSIGNMENT
DIS A 1
IN 1 2
OUT 1 3
IN 2 4
OUT 2 5
IN 3 6
OUT 3 7
V_SS 8
16 V_DD
15 DIS B
14 IN 6
13 OUT 6
12 IN 5
11 OUT 5
10 IN 4
9 OUT 4
LOGIC DIAGRAM
DISABLE B ¹⁵
IN 5 ¹²
IN 6 ¹⁴
IN 1 ²
IN 2 ⁴
IN 3 ⁶
IN 4 ¹⁰
DISABLE A ¹
11 _{OUT 5}
13 _{OUT 6}
3 _{OUT 1}
5 _{OUT 2}
7 _{OUT 3}
9 _{OUT 4}
V_DD = PIN 16
V_SS = PIN 8
MC14503B
TRUTH TABLE
Appropriate
Disable
In_n
Input
Out_n
0
0
0
1
0
1
X
1
High
Impedance
X = Don’t Care
CIRCUIT DIAGRAM
ONE OF TWO/FOUR BUFFERS
V_DD
* IN_n
* DISABLE
* INPUT
TO OTHER BUFFERS
*Diode protection on all inputs (not shown)
OUT_n
V_SS
ORDERING INFORMATION
Device
Package
Shipping^†
MC14503BCPG
PDIP−16
(Pb−Free)
500 / Rail
MC14503BDG
SOIC−16
(Pb−Free)
48 / Rail
MC14503BDR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
MC14503BFELG
SOEIAJ−16
(Pb−Free)
2000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
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