MC10124_02 Datasheet, PDF (2/8 Pages) ON Semiconductor – Quad TTL to MECL Translator

MC10124
ELECTRICAL CHARACTERISTICS
Characteristic
Negative Power Supply
Drain Current
Positive Power Supply
Drain Current
Reverse Current
Symbol
I_E
I_CCH
I_CCL
I_R
Forward Current
I_F
Input Breakdown Voltage
BV_in
Clamp Input Voltage
V_I
High Output Voltage
V_OH
Low Output Voltage
V_OL
High Threshold Voltage
V_OHA
Low Threshold Voltage
V_OLA
Switching Times
Load)
(50Ω
Propagation Delay
(+3.5Vdc to 50%)¹
t₆₊₁₊
t_{6–1–}
t₇₊₁₊
t_{7–1–}
t_7+3–
t_7–3+
Pin
Under
Test
8
9
9
6
7
6
7
6
7
6
7
1
3
1
3
1
3
1
3
1
1
1
1
3
3
–30°C
Min
Max
72
Test Limits
+25°C
Min
Typ
Max
66
+85°C
Min
Max
72
Unit
mAdc
5.5
5.5
–1.060
–1.060
–1.890
–1.890
–1.080
–1.080
16
25
200
50
–12.8
–3.2
–1.5
–1.5
–0.890
–0.890
–1.675
–1.675
–1.655
–1.655
5.5
5.5
–0.960
–0.960
–1.850
–1.850
–0.980
–0.980
16
25
200
50
–12.8
–3.2
–1.5
–1.5
–0.810
–0.810
–1.650
–1.650
–1.630
–1.630
5.5
5.5
–0.890
–0.890
–1.825
–1.825
–0.910
–0.910
18
25
200
50
–12.8
–3.2
–1.5
–1.5
–0.700
–0.700
–1.615
–1.615
–1.595
–1.595
mAdc
mAdc
µAdc
mAdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
ns
1.5
6.8
1.0
3.5
6.0
1.0
6.0
1.0
6.0
1.0
3.5
6.0
1.5
6.8
1.5
6.8
1.0
3.5
6.0
1.0
6.0
1.0
6.0
1.0
3.5
6.0
1.5
6.8
1.5
6.8
1.0
3.5
6.0
1.0
6.0
1.0
6.0
1.0
3.5
6.0
1.5
6.8
Rise Time
(20 to 80%)
t₁₊
1
1.0
4.2
1.1
2.5
3.9
1.1
4.3
Fall Time
(20 to 80%)
t_1–
1
1.0
4.2
1.1
2.5
3.9
1.1
4.3
1. See switching time test circuit. Propagation delay for this circuit is specified from +1.5Vdc in to the 50% point on the output waveform. The
+3.5Vdc is shown here because all logic and supply levels are shifted 2 volts positive.
http://onsemi.com
2