MC100LVEL30_06 Datasheet, PDF (2/6 Pages) ON Semiconductor – 3.3V ECL Triple D Flip−Flop with Set and Reset

MC100LVEL30
V_CC Q0 Q0 V_CC Q1 Q1 V_CC Q2 Q2 V_EE
20 19 18 17 16 15 14 13 12 11
QQ
S
R
D
QQ
S
R
D
QQ
S
R
D
1 2 3 4 5 6 7 8 9 10
S012 D0 CLK0 R0 D1 CLK1 R1 D2 CLK2 R2
Warning: All V_CC and V_EE pins must be externally connected to
Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
Table 2. PIN DESCRIPTION
PIN
FUNCTION
D0−D2
R0−R2
CLK0−CLK2
S012
Q0−Q2; Q0−Q2
V_CC
V_EE
ECL Data Inputs
ECL Reset Inputs
ECL Clock Inputs
ECL Common Set Input
ECL Differential Data Outputs
Positive Supply
Negative Supply
Table 1. TRUTH TABLE
R
S
D CLK
L
L
L
Z
L
L
H
Z
H
L
X
X
L
H
X
X
H
H
X
X
Z = LOW to HIGH Transition
X = Don’t Care
Q
L
H
L
H
Undef
Q
H
L
H
L
Undef
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
V_CC
PECL Mode Power Supply
V_EE
NECL Mode Power Supply
V_I
PECL Mode Input Voltage
NECL Mode Input Voltage
I_out
Output Current
V_EE = 0 V
V_CC = 0 V
V_EE = 0 V
V_CC = 0 V
Continuous
Surge
V_I  V_CC
V_I  V_EE
8 to 0
V
−8 to 0
V
6 to 0
V
−6 to 0
V
50
mA
100
mA
T_A
Operating Temperature Range
T_stg
Storage Temperature Range
q_JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−20
SOIC−20
−40 to +85
−65 to +150
90
60
°C
°C
°C/W
°C/W
q_JC
Thermal Resistance (Junction−to−Case)
Standard Board
SOIC−20
30 to 35
°C/W
T_sol
Wave Solder
<2 to 3 sec @ 248°C
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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