LV24250LS Datasheet, PDF (2/18 Pages) Sanyo Semicon Device – Compact Portable Equipment 1-Chip FM Tuner IC

LV24250LS
Operating Conditions at Ta = 25C
Parameter
Symbol
Conditions
Recommended supply voltage
VCC
Analog block supply voltage
VDD
Digital block supply voltage
Operating supply voltage range
VCC op
VDD op
VIO op
Interface voltage
Note : Supply voltage VIO equal VDD, or VIO ≤ VDD & VIO ≥ 2.2 V
* Stabilize the service voltage so as not to cause the voltage change by the noise etc.
Ratings
Unit
3.0
V
3.0
V
2.6 to 3.6
V
2.5 to 3.6
V
2.2 to 3.6
V
Operating Characteristics at Ta = 25°C, VCC = 3.0V, VDD = 3.0V, Volume =15/16, Soft Mute = 1/Soft Stereo = off
with the designated test circuit
Output level set with Radio Control 1 of control register map (0Dh Bit0, Bit1,Bit5 set to ‘1’, ‘1’)
Control 2 of control register map (0Dh Bit1 set to ‘1’)
In addition, Set IF_OSC = 170kHz, IF_BW = 100% (Radio Control 1 : 0D Bit6, Bit7 set to ‘1’, ’1’)
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Current drain
(in operation)
ICCA
ICCD
Analog block at 60dBV EMF input
Digital block at 60 dBV EMF input
12
17
0.3
0.8
Current drain
(in standby)
ICCA
ICCD
Analog standby mode
Digital standby mode
3
30
3
30
FM receive band
F_range
Refer to PCB mounting conditions to cover
76
108
the FM receive band of 76M to 108MHz
FM receive characteristics; MONO : fc = 80MHz, fm = 1kHz, 22.5kHzdev. Note that Soft_mute = 1, Soft_stereo function OFF, IHF-BPF used
mA
mA
A
A
MHz
3dB sensitivity
Practical sensitivity 1
Practical sensitivity 2 (Reference)
Demodulation output
-3dB LS
QS1
QS2
Vo
60dBV, 22.5kHzdev output standard,
-3dB input.
Input at S/N = 30dB
De-emphasis = 75s, SG open display
Input at S/N = 26dB
De-emphasis = 75s, SG terminal display
60dBV EMF, pin 19 output
5
8
1.10
80
110
17 dBV
EMF
16 dBV
EMF
V
160 mVrms
Channel balance
CB
60dBV EMF, pin 18 output/pin 19 output
-2
0
2
dB
Signal-to-noise ratio
S/N
60dBV EMF, pin 19 output
48
58
dB
Total harmonic distortion 1
(MONO)
Total harmonic distortion 2
(MONO)
Field intensity display level
Mute attenuation
THD1
60dBV EMF, pin 19 output, 22.5kHz dev.
THD2
60dBV EMF, pin 19 output, 75.0kHz dev.
FS
Mute-Att.
Reg1Dh_bit0 = OFF
Input level at which Reg02h_bit1-3 change
from 1 to 2.
60dBV EMF, pin 19 output
0.4
1.5
%
1.3
3
%
3
10
20 dBV
EMF
60
70
dB
FM receive characteristics ; STEREO characteristics : fc = 80MHz, fm = 1kHz, VIN = 60dBV EMF, Pilot = 10% (7.5kHzdev), MPX-Filter used
Separation
SEP
L-mod, pin 19 / pin 18 output
20
35
dB
L+R signals = 30% (22.5kHz dev.)
Total harmonic distortion (Main)
THD-ST1 Main-mod (for L + R input), 19 output
0.6
1.8
%
IHF_BPF L+R signals = 30% (22.5kHzdev.)
Interface block allowable operation range at Ta = -20 to +70C, VSS = 0V
Parameter
Supply voltage
Digital block input
Digital block output
External clock operating frequency
Symbol
VDD
VIH
VIL
IOL
VOL
fclk_ext
Conditions
High-level input voltage range
Low-level input voltage range
Output current at Low level
Output voltage at Low level IOL = 2mA
Clock frequency for external input
Ratings
Unit
min
typ
max
2.5
3.6
V
0.7VDD
0
2.0
VDD
V
0.1VDD
V
mA
0.6
V
32k 32.768k
20M
Hz
Note : External clock input (pin 12) allows also input of the sine wave signal.
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