English
Language : 

ESDR0502N Datasheet, PDF (2/5 Pages) ON Semiconductor – Ultra Low Capacitance ESD Protection Array for High Speed Data Line Protection
ESDR0502N
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
Parameter
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IR
Maximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
IT
Test Current
IF
Forward Current
VF
Forward Voltage @ IF
Ppk
Peak Power Dissipation
C
Capacitance @ VR = 0 and f = 1.0 MHz
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
I
IF
VC VBR VRWM
IIRT VF
V
IPP
Uni−Directional TVS
ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise specified)
Parameter
Symbol
Conditions
Min
Typ
Max Unit
Reverse Working Voltage
VRWM (Note 2)
5.5
V
Breakdown Voltage
VBR
IT = 1 mA, (Note 3)
6.0
V
Reverse Leakage Current
IR
VRWM = 5.5 V
1.0
mA
ESD Clamping Voltage
VC
Per IEC61000−4−2 (Note 4)
See Figures 1 & 2
Junction Capacitance
CJ
VR = 0 V, f = 1 MHz between I/O Pins and GND
0.3
0.6
pF
Junction Capacitance
CJ
VR = 0 V, f = 1 MHz between I/O Pins
0.3
0.6
pF
2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC
or continuous peak operating voltage level.
3. VBR is measured at pulse test current IT.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
http://onsemi.com
2