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CM3106 Datasheet, PDF (2/9 Pages) California Micro Devices Corp – 2 Amp Source/ Sink Bus Termination Regulator
CM3106
SIMPLIFIED ELECTRICAL SCHEMATIC
AVIN
VDDQ
PVIN
Over Temp
Over Current
Reference
VREF
OUT IN
Buffer
Driver
VTT
VSENSE
Table 1. PIN DESCRIPTIONS
Lead(s) Name
Description
1
NC
No Connect
2
GND Ground
3
VSENSE Feedback
4
VREF
Reference Output, VDDQ/2
5
VDDQ
VDDQ Input
6
AVIN
Analog Input
7
PVIN
Power Input
8
VTT
Output
GND
PACKAGE / PINOUT DIAGRAM
Top View
NC
1
GND
2
VSENSE
3
VREF
4
8
VTT
7
PVIN
6
AVIN
5
VDDQ
8−Lead SOIC
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
AVIN Operating Supply Voltage
VDDQ Input Voltage
Pin Voltages
VTT Output
Any other pins
7
V
7
V
V
7
7
ESD (HBM)
±2000
V
Storage Temperature Range
−40 to +150
°C
Operating Temperature Range
Ambient
Junction
°C
−40 to +85 (Note 1)
−40 to +150
Power Dissipation (Note 1)
Internally Limited
W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. These devices must be derated based on thermal resistance at elevated temperatures. The device packaged in an 8−lead SOIC leadframe
must be derated at qJA = 151°C/W. qJA of the 8−lead PSOP is 40°C/W.
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