CAV25010 Datasheet, PDF (2/12 Pages) ON Semiconductor – SPI Serial CMOS EEPROM

25xx0E
AYMXXX
G
(SOIC−8)
CAV25010, CAV25020, CAV25040
MARKING DIAGRAMS
25010E = CAV25010
25020E = CAV25020
25040E = CAV25040
A = Assembly Location
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
XXX = Last Three Digits of
XXX = Assembly Lot Number
G = Pb−Free Package
SxxE
AYMXXX
G
(TSSOP−8)
S01E = CAV25010
S02E = CAV25020
S04E = CAV25040
A = Assembly Location
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
XXX = Last Three Digits of
XXX = Assembly Lot Number
G = Pb−Free Package
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Operating Temperature
−45 to +130
°C
Storage Temperature
−65 to +150
°C
Voltage on any Pin with Respect to Ground (Note 1)
−0.5 to V_CC + 0.5
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol
Parameter
N_END (Note 3)
T_DR
Endurance
Data Retention
Min
1,000,000
100
Units
Program / Erase Cycles
Years
Table 3. D.C. OPERATING CHARACTERISTICS (V_CC = 2.5 V to 5.5 V, T_A = −40°C to +125°C, unless otherwise specified.)
Symbol
Parameter
Test Conditions
Min
Max
Units
I_CCR
I_CCW
I_SB1
Supply Current (Read Mode)
Supply Current (Write Mode)
Standby Current
I_SB2
Standby Current
I_L
Input Leakage Current
I_LO
Output Leakage Current
Read, V_CC = 5.5 V, 10 MHz, SO open
Write, V_CC = 5.5 V, 10 MHz, SO open
V_IN = GND or V_CC, CS = V_CC,
WP = V_CC, V_CC = 5.5 V
V_IN = GND or V_CC, CS = V_CC,
WP = GND, V_CC = 5.5 V
V_IN = GND or V_CC
CS = V_CC,
V_OUT = GND or V_CC
2
mA
2
mA
2
mA
5
mA
−2
2
mA
−1
2
mA
V_IL
Input Low Voltage
V_IH
Input High Voltage
V_OL
Output Low Voltage
V_OH
Output High Voltage
I_OL = 3.0 mA
I_OH = −1.6 mA
−0.5
0.3 V_CC
V
0.7 V_CC
V_CC + 0.5
V
0.4
V
V_CC − 0.8 V
V
Table 4. PIN CAPACITANCE (Note 2) (T_A = 25°C, f = 1.0 MHz, V_CC = +5.0 V)
Symbol
Test
Conditions
Min
Typ
Max
Units
C_OUT
Output Capacitance (SO)
V_OUT = 0 V
8
pF
C_IN
Input Capacitance (CS, SCK, SI, WP, HOLD)
V_IN = 0 V
8
pF
1. The DC input voltage on any pin should not be lower than −0.5 V or higher than V_CC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than −1.5 V or overshoot to no more than V_CC + 1.5 V, for periods of less than 20 ns.
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
3. Page Mode, V_CC = 5 V, 25°C.
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