CAT6242 Datasheet, PDF (2/14 Pages) ON Semiconductor – 1.3 Amp CMOS LDO Voltage Regulator

CAT6242
VIN
VIN VOUT
C_IN
1 mF
SENSE
CAT6242
ENABLE
BYP
C_BYP
GND
(Optional)
VOUT
C_OUT
2.2 mF
Figure 1. Application Schematic
VIN
I_SENSE
Thermal
Shutdown
+
−
2.5 M
EN
Enable
Logic
+
V_REF ^−
VOUT
SENSE
NC
BYP
GND
Figure 2. Simplified Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin #
WDFN−6
Pin Name
Description
1
EN
The Enable Input. An active HIGH input, turning ON the LDO. A pull−up 2.5 MW resistor maintains the
circuit in the ON state if the pin is left open.
2, Pad
GND
Power Supply Ground; Device Substrate. The center pad is internally connected to Ground and as
such can cause short circuits to signal traces running beneath the IC. This pad is intended for heat
sinking the IC to the PCB and is typically connected to the PCB ground plane.
3
BYP
Bypass input. Placing a capacitor of 100 pF to 470 pF between BYP and ground reduces noise on
V_OUT. This capacitor is optional and it increases the turn−on time.
4
V_OUT
Regulated Output Voltage. A protection block eliminates any current flow from output to input if V_OUT
> V_IN.
5
SENSE
SENSE is the sense input of the circuit and is connected externally to the VOUT line.
6
V_IN
Positive Power Supply Input. Supplies power for V_OUT as well as the regulator’s internal circuitry.
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