CAT5114_13 Datasheet, PDF (2/15 Pages) ON Semiconductor – 32‐tap Digital Potentiometer (POT)

PDIP
CAT5114
SOIC
DEVICE MARKING INFORMATION
MSOP
TSSOP
RL4B
CAT5114LI
YMXXXX
RL4B
CAT5114VI
YMXXXX
R = Resistance:
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish − NiPdAu
B = Product Revision (Fixed as “B”)
CAT5114L = Device Code (PDIP)
CAT5114V = Device Code (SOIC)
I = Temperature Range (Industrial)
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
XXXX = Last Four Digits of Assembly Lot Number
ABMS
YMP
A4RL
4YMXXX
ABMS = CAT5114ZI−10−GT3
ABMT = CAT5114ZI−50−GT3
ABTH = CAT5114ZI−00−GT3
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
P = Product Revision
A4 = Device Code
R = Resistance:
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish − NiPdAu
Y = Production Year (last digit)
M = Production Month (1−9, O, N, D)
XXX = Last Three Digits of Assembly
XXX = Lot Number
TDFN
EFL
XXX
YM
EF = CAT5114VP2I10GT3
HF = CAT5114VP2I50GT3
GW = CAT5114VP2I00GT3
L = Assembly Location
XXX = Last Three Digits of Assembly Lot Number
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
Functional Diagram
U/D
5−Bit
31
INC
Up/Down
V_CC
CS
Counter
30
R_H/V_H
R_H/V_H
U/D
Control
INC
and
Memory
CS
Power On
Recall
GND
R_H/V_H
R_W/V_W
R_L/V_L
V_CC
GND
5−Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
29
28
32−
Position
Decoder
2
1
0
Transfer Resistor
Gates Array
R_L/V_L
R_W/V_W
Figure 1. General
Figure 2. Detailed
R_W/V_W
R_L/V_L
Figure 3. Electronic
Potentiometer
Implementation
http://onsemi.com
2