NCP1351DPG Datasheet, PDF (17/27 Pages) ON Semiconductor – Variable Off Time PWM Controller

NCP1351
Depending on the design conditions (DCM or CCM), the
error flag assertion will correspond to either 50% of the
maximum power (full load DCM design) or a value above
this number if the converter operates in CCM at full load and
remains in CCM at half the switching frequency.
The figures below details circuits operation for the various
controller options.
V_cc
ICC1
I_FB
FB reacts
V_timer
Latched
state
fault
ok
Pulldown
SCR action
ICC1
ICC < 20 μA
User
reset
Vcc_ON
Vcc_stop
V_zener
ok
40 μA
V_timer
DRV
startup
A version, latched
Figure 20. The A Version Latches-off in Presence of a Fault
V_cc
ICC1
I_FB
FB reacts
V_timer
fault
ok
Pulses
stopped
ICC4
Fault
still present
ICC1
Auto -recovery
DRV
startup
Vcc _ON
Vcc _stop
V_zener
40 μA
V_timer
B version, auto-recovery
Figure 21. The B Version Enters an Auto-Recovery Burst Mode in Presence of a Fault
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