NCP1650 Datasheet, PDF (16/31 Pages) ON Semiconductor – Power Factor Controller

NCP1650
The difference between V_error(ac) and the 4.0 volt
reference, sets the window that the instantaneous current
will modulate in, to determine when to turn the power switch
off.
The switch is turned on by the oscillator, which makes this
a fixed frequency controller. Under normal operation, the
switch will remain on until the instantaneous value of
V_{error(ac)} reaches the 4.0 volt reference level, at which time
the switch will turn off.
Since the input current has a fundamental frequency that
is twice that of the line, the output filter must have poles
lower than the input current to create a reasonable DC
waveform. The output DC voltage is divided down via. an
external divider and fed back to the DC error amplifier.
Protection Features
The NCP1650 contains a number of features to protect the
device and circuit from overload and stressful conditions.
These include:
 Output voltage overshoot protection
 Low line input protection
 Instantaneous current limit
 Line frequency current limit
 Maximum power limit
Output Voltage Overshoot Protection
An overshoot comparator has been provided to monitor
the output voltage. Due to the slow transient response of a
PFC controller, a fast load dump can cause a large output
voltage transient to occur.
The overshoot comparator uses the same input as the
feedback and shutdown signals. Its reference is set 8%
higher than the reference used by the error amplifier. This
comparator will shutdown the output stage if the output
voltage exceeds the set level by 8%. The circuit will resume
operation once the voltage is reduced to within 8% of the set
level.
Low Line Input Protection
This feature uses the shutdown circuitry to assure that the
unit does not start under low line condition. PFC converters
typically are designed with an output voltage of 400 VDC.
To reduce this to the level of the 4.0 volt reference, a 100:1
ratio is required for the voltage divider to the FB/SD pin.
When the converter is energized, the output voltage will be
the peak line voltage. If the peak line voltage does not exceed
75 volts (0.75 volts at the FB/SD pin) the unit will not start.
This corresponds to a line voltage of 53 volts rms.
Application circuits have been provided in Figures 33
and 34 to override this feature if desired.
Instantaneous Current Limit
The fastest protection available is a cycle--by--cycle
current limit feature.
The current sense amplifier has three outputs. One is the
instantaneous current in the inductor, and the other two are
average current waveforms. The instantaneous current
signal goes directly to the PWM and is terminated by an
internal 16 kΩ resistor. This current signal is added to the
output of the AC error amplifier and the ramp compensation
signal. The switch will conduct current until the sum of these
three signals reaches the 4.0 V reference of the inverting
input to the PWM comparator. The peak current is
determined by the value of the ramp compensation resistor
(R₁₃) and the current shunt.
Line Frequency Current Limit
The output of the reference multiplier determines the
current that will be required for the unit to regulate. The sum
of the input voltage from the Average Current
Compensation amplifier and the averaged current signal
from the current sense amplifier must add to the level of the
reference multiplier. The output of this multiplier is clamped
to a 4.5 maximum level. The maximum average current is set
by R₁₀.
This form of protection is slower than the cycle--by--cycle
current limiting, but faster than the maximum power limit
circuit.
Maximum Power Limit
The NCP1650 can limit the output power to protect
against nuisance tripping of circuit breakers or other input
power restrictions. It should be understood that boost
regulators by design, can not be short circuit limited.
Operation of the power limiting circuit will reduce the
output voltage only to the level where it is equal to the peak
of the input line voltage. At this point, the rectified line
voltage will continue to provide output voltage through line
frequency rectification by means of the series rectifier
diode.
The input power of the converter is calculated by the
power multiplier. By multiplying the instantaneous input
voltage (AC input signal, pin 5) and the instantaneous input
current (averaged current sense amplifier output), the actual
input power is accurately calculated.
The power multiplier has a very low frequency pole which
converts the power to a filtered DC level. The power error
amplifier has a reference set at 2.5 volts. If the output of the
power multiplier reaches 2.5 volts, the power error amplifier
takes control of the loop via the ORing network and will
regulate a constant power output within the limits of the
power stage. It should be understood that once the output
voltage is reduced to a level equal to the peak of the input
voltage, the converter can no longer control the output
power.
The output power level is set by combination of the I_avg
resistor at pin 10 and the P_max resistor at pin 9.
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