CS5161 Datasheet, PDF (15/18 Pages) ON Semiconductor – CPU 5−Bit Synchronous Buck Controller

CS5161, CS5161H
Layout Guidelines
1. Place 12 V filter capacitor next to the IC and connect
capacitor ground to pin 11 (PGnd).
2. Connect pin 11 (PGnd) with a separate trace to the
ground terminals of the 5.0 V input capacitors.
3. Place fast feedback filter capacitor next to pin 8 (V_FFB)
and connect it’s ground terminal with a separate, wide
trace directly to pin 14 (LGnd).
4. Connect the ground terminals of the Compensation
capacitor directly to the ground of the fast feedback
filter capacitor to prevent common mode noise from
effecting the PWM comparator.
5. Place the output filter capacitor(s) as close to the load
as possible and connect the ground terminal to pin 14
(LGnd).
6. Connect the V_FB pin directly to the load with a separate
trace (remote sense).
7. Place 5.0 V input capacitors close to the switching
MOSFET and synchronous MOSFET.
Route gate drive signals V_GATE(H) (pin 10) and
V_GATE(L) (pin 12 when used) with traces that are a
minimum of 0.025 inches wide.
1.0 μF
V_COMP
V_CC
0.1 μF
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To the negative terminal
of the input capacitors
11
8
100 pF
5
V_FFB
SOFT START
OFF TIME
To the negative terminal of the output capacitors
Figure 23. Layout Guidelines
http://onsemi.com
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