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PCA9655EDWR2G Datasheet, PDF (14/20 Pages) ON Semiconductor – Remote 16-bit I/O Expander for I2C Bus with Interrupt
PCA9655E
APPLICATION INFORMATION
V DD
(5 V)
V DD
MASTER
CONTROLLER
SCL
SDA
INT
GND
10 kW
10 kW
10 kW
V DD
PCA9655E
SCL
SDA
IO0_0
IO0_1
IO0_2
INT
IO0_3
IO0_4
IO0_5
AD2
AD1
AD0
IO0_6
IO0_7
IO1_0
IO1_1
IO1_2
IO1_3
IO1_4
IO1_5
IO1_6
IO1_7
V SS
2 kW
10 DIGIT
NUMERIC
KEYPAD
SUB−SYSTEM 1
(e.g., temp sensor)
INT
SUB−SYSTEM 2
(e.g., counter)
RESET
A
ENABLE
B
controlled
switch
(e.g., 7SB or FST)
SUB−SYSTEM 3
(e.g., alarm system)
ALARM
V DD
Device address configured as 0100 000xb for this example.
IO0_0, IO0_2, IO0_3 configured as outputs.
IO0_1, IO0_4, IO0_5 configured as inputs.
IO0_6, IO0_7, and IO1_0 to IO1_7 configured as inputs.
Figure 11. Typical Application
Characteristics of the I2C−Bus
The I2C−bus is meant for 2−way, 2−line communication
between different ICs or modules. The two lines are the
serial data line (SDA) and the serial clock line (SCL). Both
lines must be connected to a positive supply via a pull−up
resistor when connected to the output stages of a device.
Data transfer may only be initiated when the bus is not busy.
Bit Transfer
One data bit is transferred during each clock pulse. The
data on the SDA line must remain stable during the HIGH
period of the clock pulse. Changes in the data line during the
HIGH period of the clock pulse will be interpreted as control
signals (see Figure 12).
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