MC74LVXT4051 Datasheet, PDF (14/16 Pages) ON Semiconductor – ANALOG MULTIPLEXER DEMULTIPLEXER HIGH-PERFORMANCE SILICON-GATE CMOS

MC74LVXT4051
PACKAGE DIMENSIONS
TSSOP–16
DT SUFFIX
CASE 948F–01
ISSUE O
0.15 (0.006) T U S
16
2X L/2
L
PIN 1
IDENT.
1
0.15 (0.006) T U S
C
0.10 (0.004)
–T– SEATING
PLANE
D
16X K REF
0.10 (0.004) M
9
8
A
–V–
G
T U S VS
B
–U–
NOTES:
J1
K
K1
ÇÇÇÉÉÇÇÇÉÉ _{SECTION N–N}
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH OR
GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
J
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL CONDITION.
N
0.25 (0.010)
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT
DATUM PLANE -W-.
M
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
N
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
F
C --- 1.20 --- 0.047
D 0.05 0.15 0.002 0.006
DETAIL E
F 0.50 0.75 0.020 0.030
G
0.65 BSC
0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
–W–
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
H DETAIL E
L
6.40 BSC
0.252 BSC
M 0_ 8_ 0_ 8_
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