LV8814J Datasheet, PDF (14/36 Pages) ON Semiconductor – Motor Driver 3-Phase PWM Full-Wave BLDC

LV8811G, LV8813G, LV8814J
Functional Description
POWER SUPPLY PINS (VCC, RF)
RF is output power supply whereas VCC is other circuit
supply. The RF pin supplies large current to built-in
power MOS FTEs. (Figure 23)
*Please refer to page.15 ‘Motor Current Sense Resistor
Pin (RF)’ about the CLM sense resistance of RF
terminal.
GND PIN (SGND, PGND)
PGND is power ground whereas SGND is other circuit
ground. Since PGND has to tolerate surge of current,
separate it from the SGND as far away as possible and
connect it point-to-point to the ground side of the
capacitor (CM) between power supply and ground.
Internal 3.0V Voltage Regulator Pin (REG)
An internal 3.0V voltage regulator acts a power source
for internal logic, oscillator, and protection circuits.
When MDS and PH1 and PH2 are used, it is
recommended that application circuits are made using
this output. In addition, the application circuit of VTH is
same, too. The maximum load current of REG is 10mA.
Warn not to exceed this. Place capacity of 1uF degree
and the 0.1uF degree in the close this pin. (Figure 19)
Figure 20. Equivalent circuit of FG
MOTOR DRIVE OUTPUT PINS (UO, VO, WO)
These pins are output of built-in three-phase MOSFET
based inverter that drives the motor. Each leg of the
inverter is having high side P-MOSFET and low side
N-MOSFET. (Figure 21)
Figure 19. Equivalent circuit of REG
ROTATIONAL SIGNAL PIN (FG)
Frequency of the FG output represents the motor’s
electrical rotational speed (the same rectangular waves
as the UO). It is an open drain output. Recommended
pull up resistor value is 1kΩ to 10kΩ. Leave the pin
open when not in use. (Figure 20)
Figure 21. Equivalent circuit of U/V/W
HALL-SENSOR BIAS OUTPUT PIN (HB)
The LV811G, LV8813G, and LV8814 provide a bias
regulator output (1.18V typ.) for a hall sensor. It is
recommended that this output used only for hall sensor
bias.
HALL-SENSOR INPUT PINS (IN1, IN2)
Differential output signals of the Hall sensor are
connected to IN1 and IN2 individually. Its polarity is
determined by a combination of the number of slot and
poles. (Figure 29)
It is recommended to add 0.1uF capacitor between
them to filter system noise.
Topologies, in the case of a Hall IC, are shown in Figure
30 on page18. The topology (including polarity) is also
determined by the combination of the number of slot
and poles.
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