S1220PBID Datasheet, PDF (12/18 Pages) ON Semiconductor – Universal Voltage Monitors

MC34161, MC33161, NCV33161
V₂
Input V_S
V₁
GND
Output V_CC
Voltage
Pins 5, 6 _GND
V_Hys
Osc `ON'
V<sub>S</sub>
R<sub>2</sub>
R<sub>1</sub>
V<sub>CC</sub>
8
2.54V
1
Reference
7
+
2+ <sub>-</sub>
1.27V
+
3+ <sub>-</sub>
1.27V
-
++
2.8V
-
++
0.6V
4
R<sub>A</sub>
Piezo
6
5
C<sub>T</sub>
R<sub>B</sub>
The above figure shows the MC34161 configured as an overvoltage detector with an audio alarm. Channel 1 monitors input voltage V<sub>S</sub> while channel 2 is connected
as a simple RC oscillator. As the input voltage increases from ground, the output of channel 1 allows the oscillator to turn ‘ON’ when V<sub>S</sub> exceeds V<sub>2</sub>.
For known resistor values, the voltage trip points are:
For a specific trip voltage, the required resistor ratio is:
ǒ Ǔ ǒ Ǔ V<sub>1</sub> + (V<sub>th</sub> * V<sub>H</sub>)
R<sub>2</sub>
R<sub>1</sub>
)
1
V<sub>2</sub> + V<sub>th</sub>
R<sub>2</sub>
R<sub>1</sub>
)
1
R<sub>2</sub>
R<sub>1</sub>
+
V<sub>th</sub>
V<sub>1</sub>
*
V<sub>H</sub>
*
1
R<sub>2</sub>
R<sub>1</sub>
+
V<sub>2</sub>
V<sub>th</sub>
*
1
Figure 24. Overvoltage Detector with Audio Alarm
Input V<sub>S</sub>
V<sub>2</sub>
V<sub>1</sub>
GND
Output V<sub>CC</sub>
Voltage
Pin 5 GND
Output V<sub>CC</sub>
Voltage
Pin 6 GND
V<sub>Hys</sub>
t<sub>DLY</sub>
Reset LED `ON'
V_S
R₂
R₁
V_CC
8
2.54V
1
Reference
7
+
2+ _-
1.27V
+
3+ _-
1.27V
-
++
2.8V
-
++
0.6V
4
R₃
6
R_DLY
5
C_DLY
The above figure shows the MC34161 configured as a microprocessor reset with a time delay. Channel 2 monitors input voltage V_S while channel 1 performs the
time delay function. As the input voltage decreases towards ground, the output of channel 2 quickly discharges C_DLY when V_S falls below V₁. As the input voltage
increases from ground, the output of channel 2 allows R_DLY to charge C_DLY when V_S exceeds V₂.
For known resistor values, the voltage trip points are:
ǒ Ǔ ǒ Ǔ V₁ + (V_th * V_H)
R₂
R₁
)
1
V₂ + V_th
R₂
R₁
)
1
For a specific trip voltage, the required resistor ratio is:
R₂
R₁
+
V_th
V₁
*
V_H
*
1
R₂
R₁
+
V₂
V_th
*
1
For known R_DLY C_DLY values, the reset time delay is:
t_DLY = R_DLYC_DLY In
1
1
−
V_th
V_CC
Figure 25. Microprocessor Reset with Time Delay
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