CAT3643 Datasheet, PDF (12/15 Pages) Catalyst Semiconductor – 3-Channel Ultra High Efficiency Quad-Mode TM LED Driver

CAT3643
Unused LED Channels
For applications not requiring all the channels, it is
recommended the unused LED pins be tied directly to V_OUT
(see Figure 30).
1 mF
1 mF
V_IN
C_IN
1 mF
C1+ C1− C2+ C2−
V_IN
V_OUT
CAT3643
ENABLE
DIMMING
R_SET
EN/DIM
RSET
GND
LED1
LED2
LED3
C_OUT
1 mF
Figure 30. Application with 2 LEDs
Protection Mode
If an LED is disconnected, the driver senses that and
automatically ignores that channel. When all LEDs are
disconnected, the driver goes to 1x mode where the output
is equal to the input voltage.
As soon as the output exceeds about 6 V, the driver resets
itself and reevaluate the mode.
If the die temperature exceeds +150°C, the driver will
enter a thermal protection shutdown mode. When the device
temperature drops by about 20°C, the device will resume
normal operation.
LED Selection
LEDs with forward voltages (V_F) ranging from 1.3 V to
4.3 V may be used. Selecting LEDs with lower V_F is
recommended in order to improve the efficiency by keeping
the driver in 1x mode longer as the battery voltage decreases.
For example, if a white LED with a V_F of 3.3 V is selected
over one with V_F of 3.5 V, the driver will stay in 1x mode for
lower supply voltage of 0.2 V. This helps improve the
efficiency and extends battery life.
External Components
The driver requires four external 1 mF ceramic capacitors
for decoupling input, output, and for the charge pump. Both
capacitors type X5R and X7R are recommended for the
LED driver application. In all charge pump modes, the input
current ripple is kept very low by design and an input bypass
capacitor of 1 mF is sufficient.
In 1x mode, the device operates in linear mode and does
not introduce switching noise back onto the supply.
Recommended Layout
In charge pump mode, the driver switches internally at a
high frequency. It is recommended to minimize trace length
to all four capacitors. A ground plane should cover the area
under the driver IC as well as the bypass capacitors. Short
connection to ground on capacitors C_IN and C_OUT can be
implemented with the use of multiple via. A copper area
matching the TQFN exposed pad (TAB) must be connected
to the ground plane underneath. The use of multiple via
improves the package heat dissipation.
Pin1
C2
RSET
EN/DIM
C1
GND
C_OUT
C_IN
VIN
GND
VOUT
Figure 31. TDFN−12 Recommended Layout
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