CS5303 Datasheet, PDF (11/19 Pages) ON Semiconductor – Three−Phase Buck Controller with Integrated Gate Drivers

CS5303
SWNODE
V_FB (V_OUT)
CSA Out
COMP − Offset
CSA Out + V_FB
T1
T2
Figure 10. Open Loop Operation
Inductive Current Sensing
For lossless sensing current can be sensed across the
inductor as shown below in Figure 11. In the diagram L is the
output inductance and R_L is the inherent inductor resistance.
To compensate the current sense signal the values of R1 and
C1 are chosen so that L/R_L = R1 × C1. If this criteria is met
the current sense signal will be the same shape as the
inductor current, the voltage signal at Cx will represent the
instantaneous value of inductor current and the circuit can be
analyzed as if a sense resistor of value R_L was used as a sense
resistor (R_S).
SWNODE
V_OUT
R1
L
C1
R_L
CS
+
CSA
+
OFFSET ⁺
CS_REF
+
V_FB
DAC_OUT ^{E+ .A.}
COMP
PWM-
COMP
+
considered when setting the I_LIM threshold. If a more
accurate current sense is required than inductive sensing can
provide, current can be sensed through a resistor as shown
in Figure 9.
Current Sharing Accuracy
PCB traces that carry inductor current can be used as part
of the current sense resistance depending on where the
current sense signal is picked off. For accurate current
sharing, the current sense inputs should sense the current at
the same point for each phase and the connection to the
CS_REF should be made so that no phase is favored. (In some
cases, especially with inductive sensing, resistance of the
pcb can be useful for increasing the current sense
resistance.) The total current sense resistance used for
calculations must include any pcb trace between the CS
inputs and the CS_REF input that carries inductor current.
Current Sense Amplifier Input Mismatch and the value of
the current sense element will determine the accuracy of
current sharing between phases. The worst case Current
Sense Amplifier Input Mismatch is 5 mV and will typically
be within 3 mV. The difference in peak currents between
phases will be the CSA Input Mismatch divided by the current
sense resistance. If all current sense elements are of equal
resistance a 3 mV mismatch with a 2 mΩ sense resistance
will produce a 1.5 A difference in current between phases.
Operation at > 50% Duty Cycle
For operation at duty cycles above 50% Enhanced V²
will exhibit subharmonic oscillation unless a compensation
ramp is added to each phase. A circuit like the one on the left
side of Figure 12 can be added to each current sense network
to implement slope compensation. The value of R1 can be
varied to adjust the ramp size.
Gate(L)X
Switch Node
3k
R1
25 k
Figure 11. Lossless Inductive Current Sensing with
Enhanced V²
When choosing or designing inductors for use with
inductive sensing, tolerances and temperature effects should
be considered. Cores with a low permeability material or a
large gap will usually have minimal inductance change with
temperature and load. Copper magnet wire has a
temperature coefficient of 0.39% per °C. The increase in
winding resistance at higher temperatures should be
MMBT2222LT1
1 nF
0.1 μF
CS_X
.01 μF
CS_REF
Slope Comp
Circuit
Existing Current
Sense Circuit
Figure 12. External Slope Compensation Circuit
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