CAT3649 Datasheet, PDF (11/14 Pages) ON Semiconductor – 6-Channel Quad-Mode LED Driver with 32 Dimming Levels & PWM

CAT3649
Figure 28. ADIM Dimming Timing Diagram (no C_PWM, PWM high)
C_PWM Filtering Capacitor
The PWM input signal controls the LED current
proportionally to its duty cycle. When the LED driver
operates in PWM dimming mode, the C_PWM capacitor
minimizes the LED current ripple. This prevents audio noise
from the LED driver output capacitors as the PWM signal is
converted into a near DC current internally. The PWM input
is a logic input and the amplitude of the PWM signal does
not affect the LED current. An internal 4 mA current source
is charging the C_PWM capacitor when the PWM input is high
until it reaches a maximum voltage; see Figure 29 block
diagram. The internal resistor R (150 kW) and external
capacitor C_PWM act as a low pass filter with a cut−off
frequency f_C = 1 / 2π R C_PWM.
To minimize the ripple current, we recommend the PWM
frequency f_PWM to be at least 40 times greater than the
cut−off frequency f_C:
f_PWM w 40 f_C or
(eq. 2)
C_PWM
w
(2p
40
R f_PWM)
(eq. 3)
For example for f_PWM = 1 kHz, the capacitor value is:
C_PWM w _(2p
40
150 10³
10³) ^{+ 42 nF (eq. 4)}
We recommend a 47 nF capacitor C_PWM compatible for
any PWM frequency between 1 kHz and 200 kHz. For PWM
frequency below 1 kHz, the above formula will provide the
recommended capacitor value.
The C_PWM capacitor affects the power−up time which is
the time to reach the nominal LED current. The power−up
time (t_PU) is proportional to the C_PWM capacitor value and
can be calculated as follows.
t_PU ^ C_PWM 3 10⁵
(eq. 5)
For example, for C_PWM = 47 nF, t_PU is about 15 ms.
PWM
4 mA
N1
Buffer
R
150 kW
V_C
G1
Voltage−
controlled
current
source
CPWM
47 nF
I = LED
current
reference
I = g x V_C
(for LED at
max current,
g = 0.045)
GND
Figure 29. PWM Circuit Block Diagram
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