SLAS5223 Datasheet, PDF (10/10 Pages) ON Semiconductor – Ultra-Low Dual SPDT Analog Switch

SLAS5223
PACKAGE DIMENSIONS
WQFN10, 1.4x1.8, 0.4P
CASE 488AQ
ISSUE C
D
ÉÉÉÉÉÉ _{PIN 1 REFERENCE}
2X
0.15 C
2X
0.15 C
0.10 C
0.08 C
3
5
9XL
1
10
L1
A
E
B
A
A1
A3
e/2
EDGE OF PACKAGE
M1
DETAIL A
Bottom View
(Optional)
ÉÉÉÉÉÉ ^{EXPOSED Cu}
MOLD CMPD
A3
A1
C
SEATING
PLANE
DETAIL B
Side View
(Optional)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
5. EXPOSED PADS CONNECTED TO DIE FLAG.
USED AS TEST CONTACTS.
MILLIMETERS
DIM MIN MAX
A 0.70 0.80
A1 0.00 0.050
A3 0.20 REF
b 0.15 0.25
D
1.40 BSC
E
1.80 BSC
e
0.40 BSC
L 0.30 0.50
L1 0.40 0.60
M1 0.00 0.05
MOUNTING FOOTPRINT*
6
e
0.663
0.0261
1.700
0.0669
9X
0.563
0.0221
10 X
0.10 C A B
b
0.05 C NOTE 3
0.200
0.0079
1
2.100
0.0827
0.400
0.0157
PITCH
10 X
0.225
0.0089
ǒ Ǔ _{SCALE 20:1}
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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SLAS5223/D