NCP5378MNR2G Datasheet, PDF (10/18 Pages) ON Semiconductor – Single Phase Synchronous Buck Controller with Integrated Gate Drivers and Programmable DAC

IN
DRVL
DRVH−SW
SW
NCP5378
tpdl_DRVL
tf_DRVL
90%
2V
10%
tpdh_DRVH
th_DRVH
10%
90%
90%
tpdl_DRVH
tf_DRVH
10%
tr_DRVL
90%
2V
10%
tpdh_DRVL
Figure 2. Timing Diagram
FUNCTIONAL DESCRIPTIONS
General
The NCP5378 is a ramp−pulse−modulated (RPM)
controller designed with necessary features for CPU
applications. The IC consists of the following blocks:
Precision Flexible DAC, Differential Remote Voltage Sense
Amplifier, High Performance Voltage Error Amplifier,
Differential Current Feedback Amplifier, precision
programmable DAC and PWM Comparator with
Hysteresis. The controller also supports power saving
operation at light load. Protection features include:
Undervoltage Lockout, Soft Start, Over Current Protection,
Over Voltage Protection, and Power Good Monitor.
VID Inputs
VID0−VID7 control the target regulation voltage during
normal operation. In VR11 mode the VID capture is enabled
at the end of the V_BST waiting period. If the VID is valid the
DAC counter will track to it. If an invalid VID occurs it will
be ignored for 10 ms before the controller shuts down.
Remote Sense Amplifier
A high performance differential amplifier is provided to
accurately sense the output voltage of the regulator. The
noninverting input should be connected to the regulator’s
output voltage. The inverting input should be connected to
the return line of the regulator. Both connection points are
intended to be at a remote point so that the most accurate
reading of the output voltage can be obtained. The amplifier
is configured in a very unique way. First, the gain of the
amplifier is internally set to unity. Second, both the inverting
and noninverting inputs of the amplifier are summing nodes.
The inverting input sums the output voltage return voltage
with the DAC voltage. The noninverting input sums the
remote output voltage with a 1.3 V reference. The resulting
voltage at the output of the remote sense amplifier is:
V_Diffout + V_out ) 1.3 V * V_dac * V_outreturn
This signal then goes through a standard compensation
circuit and into the inverting input of the error amplifier. The
noninverting input of the error amplifier is also connected to
the 1.3 V reference. The 1.3 V reference then is subtracted
out and the error signal at the comp pin of the error amplifier
is as normally expected:
V_comp + V_dac * V_out
The noninverting input of the remote sense amplifier is pulled
low through a small current sink during a fault condition to
prevent accidental charging of the regulator output.
High Performance Voltage Error Amplifier
A high performance voltage error amplifier is provided.
The error amplifier’s inverting input and its output (the
compensation pin) are both pinned out. A standard type 3
compensation circuit is used to compensate the system. This
involves a 3 pole, 2 zero compensation network. The system
output current during a transient can slew as fast as 500 A/ms.
The high frequency output impedance of the system may be
as low as 0.5 milli−ohm. The PWM will need to go from a low
duty cycle to full duty cycle within 100 ns. In order to respond
to this magnitude of change, the output of the error amplifier
must slew at a rate of at least 5 V/ms. The error amplifier
output voltage needs to be able to slew from steady state to
below 1.0 V or above 2.5 V. The error amplifier also needs to
be very fast. The output of the error amplifier needs to
respond within 50 ns to any perturbation on the input.
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