NCP372_10 Datasheet, PDF (10/12 Pages) ON Semiconductor – Positive and Negative Overvoltage Protection Controller

NCP372
Thermal Shutdown protection
In case of internal overheating, the integrated thermal
shutdown protection turns off the internal MOSFETs in
order to instantaneously decrease the device temperature.
The thermal threshold has been set at 150°C FLAG then
goes low to inform the MCU.
As the thermal hysteresis is 30°C, the MOSFETs will
turn on as soon the device temperature falls below 120°C.
If the fault event is still present, the temperature increase
engages the thermal shutdown again until the fault event
disappears.
250
PCB Recommendations
Since the NCP372 integrates 2.5 A N−MOSFETs, PCB
rules must be respected to properly evacuate the heat out of
the silicon.
From an applications standpoint, PAD1 of the NCP372
package should be connected to an isolated PCB area to
increase the heat transfer if necessary.
In any case, PAD1 should be not connected to any other
potential or GND other than the isolated extra copper
surface.
To assist in the design of the transfer plane connected to
PAD1, Figure 18 shows the copper area required with
respect to R_qJA.
2.5
Power Curve with
200
PCB cu thk 2 oz
2
150
100
50
0
0
Power Curve with
PCB cu thk 1 oz
qJA Curve with
PCB cu thk 2 oz
qJA Curve with
PCB cu thk 1 oz
100 200 300 400 500 600
COPPER HEAT SPREAD AREA (mm²)
Figure 18. Copper heat Spread Area
1.5
1
0.5
0
700
ESD Tests
The NCP372 conforms to the IEC61000−4−2, level 4 on
the Input pin. A 1 mF (I.E Murata GRM188R61E105KA12D)
must be placed close to the IN pins. If the IEC61000−4−2 is
not a requirement, a 100 nF/25 V must be placed between IN
and GND.
The above configuration supports 15 kV (Air) and 8 kV
(Contact) at the input per IEC61000−4−2 (level 4).
Please refer to Figure 19 for the IEC61000−4−2
electrostatic discharge waveform.
Figure 19. I_peak = f(t)/IEC61000−4−2
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