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CAT4104V-GT3 Datasheet, PDF (10/14 Pages) ON Semiconductor – 700 mA Quad Channel Constant Current LED Driver
CAT4104
VCC
5V
C2
1 µF
RPTC
C1
0.1 µF
VIN
LED1
CAT4104
LED2
EN/PWM LED3
R1
1436 Ω
RSET
LED4
GND
M1
R2
5 kΩ
350 mA
Figure 6. LED Current Derating
POWER DISSIPATION
The power dissipation (PD) of the CAT4104 can be
calculated as follows:
( ) ( ) PD = VIN × IIN + Σ VLEDN × ILEDN
where VLEDN is the voltage at the LED pin, and ILEDN is
the LED current. Combinations of high VLEDN voltage
and high ambient temperature can cause the
CAT4104 to enter thermal shutdown. In applications
where VLEDN is high, a resistor can be inserted in
series with the LED string to lower the power
dissipation PD.
Thermal dissipation of the junction heat consists
primarily of two paths in series. The first path is the
junction to the case (θJC) thermal resistance which is
defined by the package style, and the second path is
the case to ambient (θCA) thermal resistance, which is
dependent on board layout. The overall junction to
ambient (θJA) thermal resistance is equal to:
θJA = θJC + θCA
For a given package style and board layout, the
operating junction temperature TJ is a function of the
power dissipation PD, and the ambient temperature,
resulting in the following equation:
TJ = TAMB + PD (θJC + θCA) = TAMB + PD θJA
When mounted on a double-sided printed circuit
board with two square inches of copper allocated for
“heat spreading”, the resulting θJA is about 90°C/W for
the TDFN-8 package, and 160°C/W for the SOIC-8
package.
For example, at 60°C ambient temperature, the
maximum power dissipation for the TDFN-8 is
calculated as follow:
PDmax
=
TJmax - TAMB
θJA
= 150 - 60
90
=1W
RECOMMENDED LAYOUT
A small ceramic capacitor should be placed as close
as possible to the driver VIN pin. The RSET resistor
should have a Kelvin connection to the GND pin of
the CAT4104.
The board layout should provide good thermal
dissipation through the PCB. In the case of the
CAT4104VP2 in the TDFN package, a via can be
used to connect the center tab to a large ground
plane underneath as shown on figure 7.
Figure 7. CAT4104 Recommended Layout
Doc. No. MD-5041 Rev. B
10
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice