SN74LS74A Datasheet, PDF (1/8 Pages) ON Semiconductor – LOW POWER SCHOTTKY

SN74LS74A
Dual D-Type Positive
Edge-Triggered Flip-Flop
The SN74LS74A dual edge-triggered flip-flop utilizes Schottky
TTL circuitry to produce high speed D-type flip-flops. Each flip-flop
has individual clear and set inputs, and also complementary Q and Q
outputs.
Information at input D is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a
voltage level of the clock pulse and is not directly related to the
transition time of the positive-going pulse. When the clock input is at
either the HIGH or the LOW level, the D input signal has no effect.
MODE SELECT – TRUTH TABLE
OPERATING MODE
INPUTS
S_D
S_D
D
OUTPUTS
Q
Q
Set
Reset (Clear)
*Undetermined
Load “1” (Set)
Load “0” (Reset)
L
H
X
H
L
H
L
X
L
H
L
L
X
H
H
H
H
h
H
L
H
H
l
L
H
* Both outputs will be HIGH while both S_D and C_D are LOW, but the output
states are unpredictable if S_D and C_D go HIGH simultaneously. If the levels
at the set and clear are near V_IL maximum then we cannot guarantee to meet
the minimum level for V_OH.
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input
i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.
http://onsemi.com
LOW
POWER
SCHOTTKY
14
1
PLASTIC
N SUFFIX
CASE 646
14
1
SOIC
D SUFFIX
CASE 751A
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
V_CC
Supply Voltage
T_A
Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0
25
70
°C
I_OH
Output Current – High
I_OL
Output Current – Low
– 0.4 mA
8.0
mA
ORDERING INFORMATION
Device
Package
Shipping
SN74LS74AN 14 Pin DIP 2000 Units/Box
SN74LS74AD
14 Pin
2500/Tape & Reel
© Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS74A/D