SN74LS192 Datasheet, PDF (1/7 Pages) ON Semiconductor – PRESETTABLE 4-BIT COUNTER

SN74LS192
PRESETTABLE BCD/DECADE
UP/DOWN COUNTER
PRESETTABLE 4-BIT
BINARY UP/DOWN
COUNTER
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The SN54/74LS192 is an UP/DOWN BCD Decade (8421) Counter
and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary
Counter. Separate Count Up and Count Down Clocks are used and in
either counting mode the circuits operate synchronously. The outputs
change state synchronous with the LOW-to-HIGH transitions on the
clock inputs.
Separate Terminal Count Up and Terminal Count Down outputs are
provided which are used as the clocks for a subsequent stages without
extra logic, thus simplifying multistage counter designs. Individual
preset inputs allow the circuits to be used as programmable counters.
Both the Parallel Load (PL) and the Master Reset (MR) inputs
asynchronously override the clocks.
• Low Power . . . 95 mW Typical Dissipation
• High Speed . . . 40 MHz Typical Count Frequency
• Synchronous Counting
• Asynchronous Master Reset and Parallel Load
• Individual Preset Inputs
• Cascading Circuitry Internally Provided
PRESETTABLE BCD/DECADE
UP/DOWN COUNTER
PRESETTABLE 4-BIT BINARY
UP/DOWN COUNTER
LOW POWER SCHOTTKY
16
1
16
1
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
CONNECTION DIAGRAM DIP (TOP VIEW)
V_CC P₀ MR TC_D TC_U PL P₂ P₃
16 15 14 13 12 11 10 9
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as the Dual
In-Line Package.
1 2 3 4 56 78
P₁ Q₁ Q₀ CP_D CP_U Q₂ Q₃ GND
PIN NAMES
LOADING (Note a)
HIGH
LOW
CP_U
CP_D
MR
Count Up Clock Pulse Input
Count Down Clock Pulse Input
Asynchronous Master Reset (Clear) Input
0.5 U.L.
0.5 U.L.
0.5 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L. 5
PL
Asynchronous Parallel Load (Active LOW) Input 0.5 U.L. 0.25 U.L.
P_n
Parallel Data Inputs
Q_n
Flip-Flop Outputs (Note b)
0.5 U.L. 0.25 U.L.
10 U.L. 5 (2.5) U.L.
4
TC_D
Terminal Count Down (Borrow) Output (Note b) 10 U.L. 5 (2.5) U.L.
TC_U
Terminal Count Up (Carry) Output (Note b)
10 U.L. 5 (2.5) U.L.
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b. Temperature Ranges.
16
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
LOGIC SYMBOL
11 15 1 10 9
PL P₀ P₁ P₂ P₃
CP_U
TC_U
12
CP_D
MR Q₀
Q₁
Q₂
Q₃ ^TCD
13
14 3 2 6 7
V_CC = PIN 16
GND = PIN 8
© Semiconductor Components Industries, LLC, 2006
1
July, 2006 − Rev. 7
Publication Order Number:
SN74LS192/D