NVMFS5A160PLZ Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET

NVMFS5A160PLZ
Advance Information
Power MOSFET
−60 V, 7.7 mΩ, −100 A, Single P-Channel
Features
• Small Footprint (5 × 6 mm) for Compact Design
• Low R_DS(on) to Minimize Conduction Losses
• NVMFS5A160PLZWF :
Wettable Flank Option for Enhanced Optical Inspection
• AEC-Q101 Qualified and PPAP Capable
• Pb-Free and RoHS compliance
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS at Tj = 25°C unless otherwise noted
(Notes 1, 2, 3, 4)
Parameter
Symbol
Value
Unit
Drain to Source Voltage
VDSS
−60 V
Gate to Source Voltage
VGS
±20 V
Continuous Drain
Current ^RθJC
(Notes 2, 4)
Power Dissipation
R_θJC (Note 2)
Steady
State
TC = 25°C ID
TC = 25°C PD
−100 A
200 W
Continuous Drain
Current ^RθJA
(Notes 2, 3, 4)
Power Dissipation
R_θJA (Notes 2, 3)
Steady ^{TA = 25°C ID}
State
TA = 25°C PD
−15 A
3.8 W
Pulsed Drain
Current
PW ≤ 10 μs,
duty cycle ≤ 1%
IDP
Operating Junction and Storage Temperature
TJ,
Tstg
−400 A
−55 to +175 °C
Source Current (Body Diode)
IS
−100 A
Single Pulse Drain to Source Avalanche
Energy (L = 1.0 mH, IL(pk) = −26 A)
EAS
335 mJ
Lead Temperature for Soldering Purposes
(1/8" from case for 10 s)
TL
260 °C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Junction to Case Steady State
Junction to Ambient Steady State (Note 3)
R_θJC
R_θJA
Value
0.75
39
Unit
°C/W
Note 1 : Stresses exceeding those listed in the Maximum Ratings table may damage
the device. If any of these limits are exceeded, device functionality should not
be assumed, damage may occur and reliability may be affected.
Note 2 : The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
Note 3 : Surface mounted on FR4 board using a 650 mm², 2 oz. Cu pad.
Note 4 : Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
www.onsemi.com
VDSS
−60 V
RDS(on) Max
7.7 mΩ @ −10 V
10.5 mΩ @ −4.5 V
ID _Max
−100 A
ELECTRICAL CONNECTION
D (5)
G (4)
1 : Source
2 : Source
3 : Source
4 : Gate
5 : Drain
S (1,2,3)
P-Channel MOSFET
DFN5
(SO-8FL)
MARKING DIAGRAM
D
S
D
S _XXXXXX
S AYWZZ
G
D
D
XXXXXX= Specific Device Code
5A160L(NVMFS5A160PLZ)
160LWF(NVMFS5A160PLZWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
See detailed ordering and shipping
information on page 6 of this data sheet.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
© Semiconductor Components Industries, LLC, 2016
1
December 2016 - Rev. P2
Publication Order Number :
NVMFS5A160PLZ /D