NVMFD5852NL Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET 40 V, 6.9 mohm, 44 A, Dual N.Channel Logic Level, Dual SO.8FL

NVMFD5852NL,
NVMFD5852NLWF
Power MOSFET
40 V, 6.9 mW, 44 A, Dual N−Channel Logic
Level, Dual SO−8FL
Features
• Small Footprint (5x6 mm) for Compact Designs
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• NVMFD5852NLWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
• This is a Pb−Free Device
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
40
V
Gate−to−Source Voltage
V_GS
"20 V
Continuous Drain Cur-
T_mb = 25°C
I_D
rent R_YJ−mb (Notes 1,
2, 3, 4)
Steady ^Tmb ^{= 100°C}
Power Dissipation
State _{Tmb = 25°C}
P_D
R_YJ−mb (Notes 1, 2, 3)
T_mb = 100°C
44
A
31
27
W
13
Continuous Drain Cur-
T_A = 25°C
I_D
rent R_qJA (Notes 1, 3
& 4)
Steady ^TA ^{= 100°C}
Power Dissipation
R_qJA (Notes 1 & 3)
State
T_A = 25°C
P_D
T_A = 100°C
15
A
10.6
3.2
W
1.6
Pulsed Drain Current T_A = 25°C, t_p = 10 ms
I_DM
329
A
Operating Junction and Storage Temperature
T_J, T_stg − 55 to °C
175
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T_J = 25°C, V_GS = 10 V, I_L(pk) = 40 A,
L = 0.1 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
I_S
40
A
E_AS
80
mJ
T_L
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
R_YJ−mb
5.6
°C/W
Junction−to−Ambient − Steady State (Note 3)
R_qJA
47
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm², 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
http://onsemi.com
V_(BR)DSS
40 V
R_DS(on) MAX
6.9 mW @ 10 V
12.0 mW @ 4.5 V
I_D MAX
44 A
Dual N−Channel
D1
D2
G1
G2
S1
S2
MARKING DIAGRAM
1
DFN8 5x6
(SO8FL)
CASE 506BT
D1 D1
S1
D1
G1 5852xx D1
S2 AYWZZ D2
G2
D2
D2 D2
5852NL = Specific Device Code
for NVMFD5852NL
5852LW = Specific Device Code
for NVMFD5852NLWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
Device
Package Shipping^†
NVMFD5852NLT1G
DFN8 1500 / Tape &
(Pb−Free)
Reel
NVMFD5852NLWFT1G DFN8 1500 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
1
April, 2013 − Rev. 5
Publication Order Number:
NVMFD5852NL/D