NVD6824NL_16 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET

NVD6824NL
Power MOSFET
100 V, 20 mW, 41 A, Single N−Channel
Features
• Low R_DS(on) to Minimize Conduction Losses
• High Current Capability
• Avalanche Energy Specified
• AEC−Q101 Qualified
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
100
V
Gate−to−Source Voltage
V_GS
"20 V
Continuous Drain Cur-
T_C = 25°C
I_D
rent R_qJC (Note 1)
Steady ^{TC = 100°C}
Power Dissipation R_qJC ^State T_C = 25°C
P_D
(Note 1)
T_C = 100°C
41
A
29
90
W
45
Continuous Drain Cur-
T_A = 25°C
I_D
rent R_qJA (Notes 1 & 2) _{Steady TA = 100°C}
Power Dissipation R_qJA ^State T_A = 25°C
P_D
(Notes 1 & 2)
T_A = 100°C
8.5
A
6.0
3.9
W
1.9
Pulsed Drain Current T_A = 25°C, t_p = 10 ms I_DM
238
A
Current Limited by
Package (Note 3)
T_A = 25°C
I_Dmaxpkg
60
A
Operating Junction and Storage Temperature
T_J, T_stg − 55 to °C
175
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T_J = 25°C, V_GS = 10 V,
I_L(pk) = 40 A, L = 0.1 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
I_S
41
A
E_AS
80
mJ
T_L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
Junction−to−Case − Steady State (Drain)
R_qJC
1.7 °C/W
Junction−to−Ambient − Steady State (Note 2) R_qJA
39
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surface−mounted on FR4 board using a 650 mm², 2 oz. Cu pad.
3. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
www.onsemi.com
V_(BR)DSS
100 V
R_DS(on)
20 mW @ 10 V
23 mW @ 4.5 V
I_D
41 A
4
12
3
DPAK
CASE 369C
STYLE 2
N−Channel
D
G
S
MARKING DIAGRAMS
& PIN ASSIGNMENT
4
Drain
2
1 ^Drain 3
Gate Source
Y
WW
6824L
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
Device
Package Shipping^†
NVD6824NLT4G
DPAK
2500/Tape
(Pb−Free) & Reel
NVD6824NLT4G−VF01 DPAK
2500/Tape
(Pb−Free) & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
1
October, 2016 − Rev. 2
Publication Order Number:
NVD6824NL/D