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NVD5484NL Datasheet, PDF (1/6 Pages) ON Semiconductor – Single N−Channel Power MOSFET | |||
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NVD5484NL
Power MOSFET
60 V, 17 mW, 54 A, Single NâChannel
Logic Level, DPAK
Features
⢠Low RDS(on) to Minimize Conduction Losses
⢠High Current Capability
⢠Avalanche Energy Specified
⢠AECâQ101 Qualified and PPAP Capable
⢠These Devices are PbâFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
DrainâtoâSource Voltage
VDSS
60
V
GateâtoâSource Voltage
VGS
"20 V
Continuous Drain Cur-
TC = 25°C
ID
rent RqJC (Notes 1 & 3) Steady TC = 100°C
Power Dissipation RqJC State TC = 25°C
PD
(Note 1)
TC = 100°C
54
A
38
100 W
50
Continuous Drain Cur-
TA = 25°C
ID
rent RqJA (Notes 1, 2 &
3)
Steady TA = 100°C
Power Dissipation RqJA State TA = 25°C
PD
(Notes 1 & 2)
TA = 100°C
10.7 A
7.6
3.9
W
2.0
Pulsed Drain Current TA = 25°C, tp = 10 ms IDM
305
A
Current Limited by
Package (Note 3)
TA = 25°C
IDmaxpkg
60
A
Operating Junction and Storage Temperature
TJ, Tstg â55 to °C
+175
Source Current (Body Diode)
Single Pulse DrainâtoâSource Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL(pk) = 50 A, L = 0.1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8â³ from case for 10 s)
IS
83
A
EAS
125 mJ
TL
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
JunctionâtoâCase â Steady State (Drain)
RqJC
1.5 °C/W
JunctionâtoâAmbient â Steady State (Note 2) RqJA
38
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surfaceâmounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
http://onsemi.com
V(BR)DSS
60 V
RDS(on)
17 mW @ 10 V
23 mW @ 4.5 V
D
ID
54 A
NâChannel
G
S
4
12
3
DPAK
CASE 369AA
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENT
4
Drain
2
1 Drain 3
Gate Source
Y
= Year
WW = Work Week
5484NL = Device Code
G
= PbâFree Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
March, 2013 â Rev. 1
Publication Order Number:
NVD5484NL/D
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