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NUP4114UCW1 Datasheet, PDF (1/5 Pages) ON Semiconductor – Transient Voltage Suppressors
NUP4114UCW1
Transient Voltage
Suppressors
ESD Protection Diodes with Low
Clamping Voltage
The NUP4114UCW1 transient voltage suppressor is designed to
protect high speed data lines from ESD. Ultra−low capacitance and
high level of ESD protection makes this device well suited for use in
USB 2.0 high speed applications.
Features
• Low Capacitance 1.5 pF
• Low Clamping Voltage
• Small Body Outline Dimensions:
0.082″ x 0.078″ (2.10 mm x 1.25 mm)
• Low Body Height: 0.043″ (1.10 mm)
• Stand−off Voltage: 5.5 V
• Low Leakage
• Response Time is Typically < 1.0 ns
• IEC61000−4−2 Level 4 ESD Protection
• This is a Pb−Free Device
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V−0
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 1 Requirements
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range
TJ
−40 to +125 °C
Storage Temperature Range
Tstg
−55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL
260
°C
IEC 61000−4−2 (ESD)
Contact
Air
±8
kV
±15
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
MARKING
DIAGRAM
1
SC−88
W1 SUFFIX
CASE 419B
6
X4 MG
G
1
X4 = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONFIGURATION
AND SCHEMATIC
I/O 1
VN 2
I/O 3
6 I/O
5 VP
4 I/O
ORDERING INFORMATION
Device
Package
Shipping
NUP4114UCW1T2G SC−88 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2009
1
August, 2009 − Rev. 0
Publication Order Number:
NUP4114UCW1/D