NTMS4920N_16 Datasheet, PDF (1/5 Pages) ON Semiconductor – Power MOSFET

NTMS4920N
Power MOSFET
30 V, 17 A, N−Channel, SO−8
Features
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• DC−DC Converters
• Points of Loads
• Power Load Switch
• Motor Controls
MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
30
V
Gate−to−Source Voltage
V_GS
±20 V
Continuous Drain
Steady T_A = 25°C
I_D
14.1 A
Current R_qJA (Note 1)
State _{TA = 70°C}
11.3
Power Dissipation R_qJA Steady T_A = 25°C
P_D
1.46 W
(Note 1)
State
Continuous Drain
Steady T_A = 25°C
I_D
10.6 A
Current R_qJA (Note 2)
State _{TA = 70°C}
8.5
Power Dissipation R_qJA
(Note 2)
T_A = 25°C
P_D
0.82 W
Continuous Drain
Steady T_A = 25°C
I_D
17
A
Current R_qJA, t v 10 s State
(Note 1)
T_A = 70°C
13.6
Power Dissipation
Steady T_A = 25°C
R_qJA, t v 10 s(Note 1) State
Pulsed Drain Current
T_A = 25°C, t_p = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy
(T_J = 25°C, V_DD = 30 V, V_GS = 10 V,
I_L = 18 A_pk, L = 1.0 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
P_D
2.12 W
I_DM
136 A
T_J, −55 to °C
T_stg
150
I_S
2.1 A
E_AS
162 mJ
T_L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
Junction−to−Ambient – Steady State (Note 1)
R_qJA
85.5 °C/W
Junction−to−Ambient – t v 10 s (Note 1)
R_qJA
59
Junction−to−Foot (Drain)
R_qJF
25
Junction−to−Ambient – Steady State (Note 2)
R_qJA
152
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
2. Surfacemounted on FR4 board using the minimum recommended pad size.
www.onsemi.com
V_(BR)DSS
30 V
R_DS(ON) MAX
4.3 mW @ 10 V
5.7 mW @ 4.5 V
I_D MAX
17 A
N−Channel
D
G
S
1
SO−8
CASE 751
STYLE 12
MARKING DIAGRAM/
PIN ASSIGNMENT
1
Source
Source
8
Drain
Drain
Source
Drain
Gate
Drain
Top View
4920N = Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping^†
NTMS4920NR2G SO−8 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
February, 2016 − Rev. 2
Publication Order Number:
NTMS4920N/D