NTMS4816N_13 Datasheet, PDF (1/5 Pages) ON Semiconductor – Power MOSFET

NTMS4816N
Power MOSFET
30 V, 11 A, N−Channel, SO−8
Features
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These Devices are Pb−Free and are RoHS Compliant
Applications
• Disk Drives
• DC−DC Converters
• Printers
MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
30
V
Gate−to−Source Voltage
V_GS
±20 V
Continuous Drain
Steady T_A = 25°C
I_D
Current R_qJA (Note 1)
State
T_A = 70°C
9.0
A
7.2
Power Dissipation R_qJA Steady T_A = 25°C
P_D
1.37 W
(Note 1)
State
Continuous Drain
Steady T_A = 25°C
I_D
Current R_qJA (Note 2)
State
T_A = 70°C
6.8
A
5.4
Power Dissipation R_qJA
(Note 2)
T_A = 25°C
P_D
0.78 W
Continuous Drain
Steady T_A = 25°C
I_D
Current R_qJA, t v 10 s State
(Note 1)
T_A = 70°C
11
A
8.8
Power Dissipation
Steady T_A = 25°C
R_qJA, t v 10 s(Note 1) State
Pulsed Drain Current
T_A = 25°C, t_p = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy
(T_J = 25°C, V_DD = 30 V, V_GS = 10 V,
I_L = 12.5 A_pk, L = 1.0 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
P_D
2.04 W
I_DM
33
A
T_J, −55 to °C
T_stg
150
I_S
2.7 A
E_AS
78 mJ
T_L
260 °C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
Junction−to−Ambient – Steady State (Note 1)
R_qJA
91.5 °C/W
Junction−to−Ambient – t v 10 s (Note 1)
R_qJA
61.3
Junction−to−Foot (Drain)
R_qJF
22.5
Junction−to−Ambient – Steady State (Note 2)
R_qJA 159.5
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
2. Surfacemounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2013
1
September, 2013 − Rev. 2
http://onsemi.com
V_(BR)DSS
30 V
R_DS(ON) MAX
10 mW @ 10 V
16 mW @ 4.5 V
I_D MAX
11 A
N−Channel
D
G
S
1
SO−8
CASE 751
STYLE 12
MARKING DIAGRAM/
PIN ASSIGNMENT
1
Source
8
Drain
Source
Drain
Source
Drain
Gate
Drain
Top View
4816N = Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping^†
NTMS4816NR2G SO−8 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMS4816N/D