NTMS4704N Datasheet, PDF (1/5 Pages) ON Semiconductor – Power MOSFET 30 V, 12.3 A, Single N−Channel, SO−8

NTMS4704N
Power MOSFET
30 V, 12.3 A, Single N−Channel, SO−8
Features
• Low R_DS(on)
• Low Gate Charge
• Standard SO−8 Single Package
• Pb−Free Package is Available
Applications
• Notebooks, Graphics Cards
• Synchronous Rectification
• High Side Switch
• DC−DC Converters
MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
30
V
Gate−to−Source Voltage
V_GS
±20 V
Continuous Drain
Current (Note 1)
Steady T_A = 25°C
I_D
State
T_A = 85°C
10
A
7.3
t v 10 s T_A = 25°C
12.3
Power Dissipation
(Note 1)
Steady T_A = 25°C
P_D
State
1.6 W
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
t v 10 s
2.3
Steady T_A = 25°C
I_D
State
T_A = 85°C
7.6 A
5.4
T_A = 25°C
P_D
0.86 W
Pulsed Drain Current
t_p = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy
(V_DD = 25 V, V_GS = 10 V, I_L Peak = 7.5 A,
L = 10 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 secs)
I_DM
37
A
T_J,
−55 to °C
T_stg
150
I_S
2.3 A
E_AS
200 mJ
T_L
260 °C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
Junction−to−Ambient – Steady State (Note 1)
R_qJA
80.5 °C/W
Junction−to−Ambient – t v 10 s (Note 1)
R_qJA
55
Junction−to−Ambient – Steady State (Note 2)
R_qJA
145
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
2. Surfacemounted on FR4 board using the minimum recommended pad size.
http://onsemi.com
V_(BR)DSS
30 V
R_DS(ON) TYP
7.5 mW @ 10 V
10 mW @ 4.5 V
I_D MAX
12.3 A
N−Channel
D
G
S
1
SO−8
CASE 751
STYLE 12
MARKING DIAGRAM/
PIN ASSIGNMENT
1
Source
8
Drain
Source
Drain
Source
Drain
Gate
Drain
Top View
4704N = Device Code
A
= Assembly Location
L
= WaferLot
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping^†
NTMS4704NR2
SO−8 2500/Tape & Reel
NTMS4704NR2G SO−8 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
1
August, 2006 − Rev. 2
Publication Order Number:
NTMS4704N/D