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NTMS4107N Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET 30 V, 18 A, Single N−Channel, SO−8 | |||
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NTMS4107N
Power MOSFET
30 V, 18 A, Single NâChannel, SOâ8
Features
⢠Ultra Low RDS(on) (at 4.5 VGS), Low Gate Resistance and Low QG
⢠Optimized for Low Side Synchronous Applications
⢠High Speed Switching Capability
Applications
⢠Notebook Computer Vcore Applications
⢠Network Applications
⢠DCâDC Converters
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
DrainâtoâSource Voltage
VDSS
30
V
GateâtoâSource Voltage
VGS
$20
V
Continuous Drain
Current (Note 1)
Steady TA = 25°C
ID
State TA = 85°C
15
A
11
t v10 s TA = 25°C
18
Power Dissipation
(Note 1)
Steady
PD
State TA = 25°C
t v10 s
1.67 W
2.5
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
TA = 25°C
ID
Steady TA = 85°C
State
TA = 25°C
PD
11
A
8.0
0.93 W
Pulsed Drain Current
tp = 10 ms
Operating Junction and Storage Temperature
IDM
56
A
TJ, Tstg â55 to °C
150
Continuous Source Current (Body Diode)
Single Pulse DrainâtoâSource Avalanche
Energy (VDD = 30 V, VGS = 10 V, IPK = 42 A,
L = 1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8â³ from case for 10 s)
IS
3.0
A
EAS
880 mJ
TL
260 °C
THERMAL RESISTANCE RATINGS
Rating
Symbol Max Unit
JunctionâtoâAmbient â Steady State (Note 1)
RqJA
75 °C/W
JunctionâtoâAmbient â t v 10 s (Note 1)
RqJA
50
JunctionâtoâAmbient â Steady State (Note 2)
RqJA
135
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surfaceâmounted on FR4 board using 1â³ sq. pad size
(Cu area = 1.127â³ sq. [1 oz] including traces).
2. Surfaceâmounted on FR4 board using the minimum recommended pad size
(Cu area = 0.412â³ sq.).
http://onsemi.com
V(BR)DSS
30 V
RDS(on) TYP
3.4 mW @ 10 V
4.7 mW @ 4.5 V
ID MAX
18 A
D
G
S
8
1
SOâ8
CASE 751
STYLE 12
MARKING DIAGRAM/
PIN ASSIGNMENT
1
Source
Source
8
Drain
Drain
Source
Gate
Drain
Drain
(Top View)
4107N = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W = Work Week
ORDERING INFORMATION
Device
Package
Shippingâ
NTMS4107NR2 SOâ8
2500/Tape & Reel
â For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
1
March, 2005 â Rev. 1
Publication Order Number:
NTMS4107N/D
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