NTMFS4841NH Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET 30 V, 59 A, Single N−Channel, SO−8FL

NTMFS4841NH
Power MOSFET
30 V, 59 A, Single N−Channel, SO−8FL
Features
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Low R_G
• These are Pb−Free Devices*
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)
Parameter
Sym-
bol
Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R_qJA
(Note 1)
V_DSS
30
V
V_GS
±20
V
T_A = 25°C
I_D
T_A = 85°C
13.5
A
9.7
Power Dissipation
R_qJA (Note 1)
Continuous Drain
Current R_qJA
v10 s
T_A = 25°C
P_D
T_A = 85°C
T_A = 25°C
I_D
T_A = 85°C
2.16
W
1.1
21.8
A
15.7
Power Dissipation
T_A = 25°C
P_D
R_qJA v10 s
Steady ^{TA = 85°C}
Continuous Drain
Current R_qJA
(Note 2)
State _{TA = 25°C}
I_D
T_A = 85°C
5.7
W
2.9
8.6
A
6.2
Power Dissipation
R_qJA (Note 2)
Continuous Drain
Current R_qJC
(Note 1)
T_A = 25°C
P_D
T_A = 85°C
T_C = 25°C
I_D
T_C = 85°C
0.87
W
0.45
59
A
42.5
Power Dissipation
R_qJC (Note 1)
Pulsed Drain
Current
T_C = 25°C
P_D
T_C = 85°C
t_p =
T_A = 25°C
I_DM
10 ms
41.7
W
21.7
177
A
Operating Junction and Storage Temperature
Source Current (Body Diode)
Drain to Source dV/dt
T_J,
T_STG
I_S
dV/dt
−55 to
+150
35
6
°C
A
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (V_DD = 24 V, V_GS = 10 V, I_L = 25.6 A,
L = 0.3 mH, R_G = 25 W)
EAS
98
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2010
1
May, 2010 − Rev. 4
http://onsemi.com
V_(BR)DSS
30 V
R_DS(ON) MAX
7.0 mW @ 10 V
11.6 mW @ 4.5 V
I_D MAX
59 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
S
D
S ^4841NH
S ^AYWWG
G
G
D
D
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NTMFS4841NHT1G
Package
SO−8FL
(Pb−Free)
Shipping^†
1500 /
Tape & Reel
NTMFS4841NHT3G SO−8FL
5000 /
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting Tech-
niques Reference Manual, SOLDERRM/D.
Publication Order Number:
NTMFS4841NH/D