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NTMD6N02R2_05 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET 6.0 Amps, 20 Volts | |||
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NTMD6N02R2
Power MOSFET
6.0 Amps, 20 Volts
NâChannel Enhancement Mode
Dual SOâ8 Package
Features
⢠Ultra Low RDS(on)
⢠Higher Efficiency Extending Battery Life
⢠Logic Level Gate Drive
⢠Miniature Dual SOICâ8 Surface Mount Package
⢠Diode Exhibits High Speed, Soft Recovery
⢠Avalanche Energy Specified
⢠SOICâ8 Mounting Information Provided
⢠PbâFree Package is Available
Applications
⢠DCâDC Converters
⢠Low Voltage Motor Control
⢠Power Management in Portable and BatteryâPowered Products,
for example, Computers, Printers, Cellular and Cordless Telephones
and PCMCIA Cards
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
DrainâtoâSource Voltage
VDSS
20
DrainâtoâGate Voltage (RGS = 1.0 MW)
VDGR
20
GateâtoâSource Voltage â Continuous
VGS
"12
Thermal Resistance,
JunctionâtoâAmbient (Note 1)
RqJA
62.5
Total Power Dissipation @ TA = 25°C
PD
2.0
Continuous Drain Current @ TA = 25°C
ID
6.5
Continuous Drain Current @ TA = 70°C
ID
5.5
Pulsed Drain Current (Note 4)
IDM
50
Thermal Resistance,
JunctionâtoâAmbient (Note 2)
RqJA
102
Total Power Dissipation @ TA = 25°C
PD
1.22
Continuous Drain Current @ TA = 25°C
ID
5.07
Continuous Drain Current @ TA = 70°C
ID
4.07
Pulsed Drain Current (Note 4)
IDM
40
Thermal Resistance
JunctionâtoâAmbient (Note 3)
RqJA
172
Total Power Dissipation @ TA = 25°C
PD
0.73
Continuous Drain Current @ TA = 25°C
ID
3.92
Continuous Drain Current @ TA = 70°C
ID
3.14
Pulsed Drain Current (Note 4)
IDM
30
1. Mounted onto a 2 in square FRâ4 Board
(1 in sq. 2 oz. Cu 0.06 in thick single sided), t < 10 seconds.
2. Mounted onto a 2 in square FRâ4 Board
(1 in sq. 2 oz. Cu 0.06 in thick single sided), t = steady state.
3. Minimum FRâ4 or Gâ10 PCB, t = steady state.
4. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%.
Unit
V
V
V
°C/W
W
A
A
A
°C/W
W
A
A
A
°C/W
W
A
A
A
© Semiconductor Components Industries, LLC, 2005
1
August, 2005 â Rev. 3
http://onsemi.com
VDSS
20 V
RDS(ON) TYP
35 mW @ VGS = 4.5 V
ID MAX
6.0 A
NâChannel
D
G
8
1
S
SOICâ8
CASE 751
STYLE 11
MARKING DIAGRAM
& PIN ASSIGNMENT
1
Source 1
2
Gate 1
3
Source 2
4
Gate 2
8
Drain 1
7
Drain 1
6
Drain 2
5
Drain 2
(Top View)
E6N02 = Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
G
= PbâFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shippingâ
NTMD6N02R2 SOICâ8 2500/Tape & Reel
NTMD6N02R2G SOICâ8 2500/Tape & Reel
(PbâFree)
â For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMD6N02R2/D
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