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NTMD6N02R2 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET 6.0 Amps, 20 Volts
NTMD6N02R2
Power MOSFET
6.0 Amps, 20 Volts
N−Channel Enhancement Mode
Dual SO−8 Package
Features
• Ultra Low RDS(on)
• Higher Efficiency Extending Battery Life
• Logic Level Gate Drive
• Miniature Dual SO−8 Surface Mount Package
• Diode Exhibits High Speed, Soft Recovery
• Avalanche Energy Specified
• SO−8 Mounting Information Provided
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery−Powered Products, for
example, Computers, Printers, Cellular and Cordless Telephones and
PCMCIA Cards
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
VDSS
20
Drain−to−Gate Voltage (RGS = 1.0 MW)
VDGR
20
Gate−to−Source Voltage − Continuous
VGS
"12
Thermal Resistance −
Junction−to−Ambient (Note 1)
RθJA
62.5
Total Power Dissipation @ TA = 25°C
PD
2.0
Continuous Drain Current @ TA = 25°C
ID
6.5
Continuous Drain Current @ TA = 70°C
ID
5.5
Pulsed Drain Current (Note 4)
IDM
50
Thermal Resistance −
Junction−to−Ambient (Note 2)
RθJA
102
Total Power Dissipation @ TA = 25°C
PD
1.22
Continuous Drain Current @ TA = 25°C
ID
5.07
Continuous Drain Current @ TA = 70°C
ID
4.07
Pulsed Drain Current (Note 4)
IDM
40
Thermal Resistance −
Junction−to−Ambient (Note 3)
RθJA
172
Total Power Dissipation @ TA = 25°C
PD
0.73
Continuous Drain Current @ TA = 25°C
ID
3.92
Continuous Drain Current @ TA = 70°C
ID
3.14
Pulsed Drain Current (Note 4)
IDM
30
1. Mounted onto a 2″ square FR−4 Board
(1″ sq. 2 oz. Cu 0.06″ thick single sided), t < 10 seconds.
2. Mounted onto a 2″ square FR−4 Board
(1″ sq. 2 oz. Cu 0.06″ thick single sided), t = steady state.
3. Minimum FR−4 or G−10 PCB, t = steady state.
4. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%.
V
V
V
°C/W
W
A
A
A
°C/W
W
A
A
A
°C/W
W
A
A
A
http://onsemi.com
VDSS
20 V
RDS(ON) TYP
35 mΩ @ VGS = 4.5 V
ID MAX
6.0 A
N−Channel
D
G
S
8
1
SO−8
CASE 751
STYLE 11
MARKING DIAGRAM
& PIN ASSIGNMENT
1
Source 1
2
Gate 1
3
Source 2
4
Gate 2
E6N02
LYWW
8
Drain 1
7
Drain 1
6
Drain 2
5
Drain 2
(Top View)
E6N02 = Device Code
L
= Assembly Location
Y
= Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping†
NTMD6N02R2
SO−8
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
1
April, 2004 − Rev. 2
Publication Order Number:
NTMD6N02R2/D