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NTMD3P03R2_13 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET Dual P-Channel SOIC-8
NTMD3P03, NVMD3P03
Power MOSFET
-3.05 Amps, -30 Volts
Dual P−Channel SOIC−8
Features
• High Efficiency Components in a Dual SOIC−8 Package
• High Density Power MOSFET with Low RDS(on)
• Miniature SOIC−8 Surface Mount Package − Saves Board Space
• Diode Exhibits High Speed with Soft Recovery
• IDSS Specified at Elevated Temperature
• Avalanche Energy Specified
• Mounting Information for the SOIC−8 Package is Provided
• AEC−Q101 Qualified − NVMD3P03R2G
• These Devices are Pb−Free and are RoHS Compliant
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery−Powered Products, i.e.:
Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
VDSS
−30
VGS
±20
Thermal Resistance −
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
171
0.73
−2.34
−1.87
−8.0
Thermal Resistance −
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
100
1.25
−3.05
−2.44
−12
Thermal Resistance −
Junction−to−Ambient (Note 3)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
62.5
2.0
−3.86
−3.1
−15
Operating and Storage
Temperature Range
TJ, Tstg
−55 to
+150
Unit
V
V
°C/W
W
A
A
A
°C/W
W
A
A
A
°C/W
W
A
A
A
°C
Single Pulse Drain−to−Source Avalanche
EAS
Energy − Starting TJ = 25°C
(VDD = −30 Vdc, VGS = −4.5 Vdc, Peak IL
= −7.5 Apk, L = 5 mH, RG = 25 W)
Maximum Lead Temperature for Soldering
TL
Purposes, 1/8″ from case for 10 seconds
140
mJ
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Minimum FR−4 or G−10 PCB, t = Steady State.
2. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick
single sided), t = steady state.
3. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick
single sided), t ≤ 10 seconds.
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
http://onsemi.com
VDSS
−30 V
RDS(ON) Typ
85 mW @ −10 V
ID Max
−3.05 A
P−Channel
D
G
S
8
1
SOIC−8
SUFFIX NB
CASE 751
STYLE 11
MARKING DIAGRAM*
AND PIN ASSIGNMENT
D1 D1 D2 D2
8
ED3P03
AYWW G
G
1
S1 G1 S2 G2
ED3P03= Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
NTMD3P03R2G
Package
SOIC−8
(Pb−Free)
Shipping†
2500 / Tape &
Reel
NVMD3P03R2G SOIC−8 2500 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
© Semiconductor Components Industries, LLC, 2013
1
August, 2013 − Rev. 4
Publication Order Number:
NTMD3P03R2/D