NTMD3P03R2 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET -3.05 Amps, -30 Volts

NTMD3P03R2
Power MOSFET
−3.05 Amps, −30 Volts
Dual P−Channel SO−8
Features
• High Efficiency Components in a Dual SO−8 Package
• High Density Power MOSFET with Low R_DS(on)
• Miniature SO−8 Surface Mount Package − Saves Board Space
• Diode Exhibits High Speed with Soft Recovery
• I_DSS Specified at Elevated Temperature
• Avalanche Energy Specified
• Mounting Information for the SO−8 Package is Provided
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery−Powered Products, i.e.:
Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones
MOSFET MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance −
Junction−to−Ambient (Note 1)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4)
Thermal Resistance −
Junction−to−Ambient (Note 2)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4)
Thermal Resistance −
Junction−to−Ambient (Note 3)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ 25°C
Continuous Drain Current @ 70°C
Pulsed Drain Current (Note 4)
Operating and Storage
Temperature Range
V_DSS
V_GS
R_θJA
P_D
I_D
I_D
I_DM
R_θJA
P_D
I_D
I_D
I_DM
R_θJA
P_D
I_D
I_D
I_DM
T_J, T_stg
−30
V
±20
V
171
0.73
−2.34
−1.87
−8.0
°C/W
W
A
A
A
100
1.25
−3.05
−2.44
−12
°C/W
W
A
A
A
62.5
2.0
−3.86
−3.1
−15
−55 to
+150
°C/W
W
A
A
A
°C
Single Pulse Drain−to−Source Avalanche
E_AS
Energy − Starting T_J = 25°C
(V_DD = −30 Vdc, V_GS = −4.5 Vdc, Peak
I_L = −7.5 Apk, L = 5 mH, R_G = 25 Ω)
Maximum Lead Temperature for Soldering
T_L
Purposes, 1/8″ from case for 10 seconds
140
mJ
260
°C
1. Minimum FR−4 or G−10 PCB, t = Steady State.
2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single
sided), t = steady state.
3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single
sided), t ≤ 10 seconds.
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
http://onsemi.com
V_DSS
−30 V
R_DS(ON) TYP
85 mΩ @ −10 V
I_D MAX
−3.05 A
P−Channel
D
G
8
1
SO−8
CASE 751
STYLE 11
S
MARKING
DIAGRAM
ED3P03
LYWW
ED3P03
L
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
PIN ASSIGNMENT
Source−1
Gate−1
Source−2
Gate−2
1
8
2
7
3
6
4
5
Top View
Drain−1
Drain−1
Drain−2
Drain−2
ORDERING INFORMATION
Device
Package
Shipping^†
NTMD3P03R2
SO−8
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
1
May, 2004 − Rev. 1
Publication Order Number:
NTMD3P03R2/D