NTLJD2104P Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET

NTLJD2104P
Power MOSFET
−12 V, −4.3 A, mCOOLE Dual P−Channel,
2x2 mm, WDFN package
Features
• WDFN 2x2 mm Package with Exposed Drain Pads for Excellent
Thermal Conduction
• Lowest RDS(on) in 2x2 mm Package
• Footprint Same as SC−88 Package
• Low Profile (<0.8 mm) for Easy Fit in Thin Environments
• Bidirectional Current Flow with Common Source Configuration
• These are Pb−Free Devices
Applications
• Optimized for Battery and Load Management Applications in
Portable Equipment
• Li Ion Battery Charging and Protection Circuits
• Dual High Side Load Switch
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
−12
V
Gate−to−Source Voltage
V_GS
±8.0
V
Continuous Drain
Current (Note 1)
Steady ^TJ ^{= 25°C}
I_D
State _{TJ = 85°C}
−3.5
A
−2.5
t ≤ 5 s T_J = 25°C
−4.3
Power Dissipation
(Note 1)
Steady
P_D
State _{TJ = 25°C}
t ≤5 s
1.5
W
2.3
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
T_J = 25°C
I_D
Steady T_J = 85°C
State
T_J = 25°C
P_D
−2.4
A
−1.7
0.7
W
Pulsed Drain Current
t_p = 10 ms
I_DM
−20
A
Operating Junction and Storage Temperature T_J, T_STG −55 to °C
150
Source Current (Body Diode) (Note 2)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
I_S
−1.5
A
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm², 2 oz. Cu.
http://onsemi.com
V_(BR)DSS
−12 V
R_DS(on) TYP
60 mW @ −4.5 V
85 mW @ −2.5 V
110 mW @ −1.8 V
140 mW @ −1.5 V
190 mW @ −1.3 V
230 mW @ −1.2 V
I_D MAX
−3.0 A
−3.0 A
−0.7 A
−0.5 A
−0.2 A
−0.2 A
S1
G1
S2
G2
D1
D2
P−CHANNEL MOSFET P−CHANNEL MOSFET
D2
D1
MARKING
DIAGRAM
Pin 1
WDFN6
CASE 506AN
1
2
JCMG
6
5
3^G 4
JC = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
S1 ₁
D1
6 ^D1
G1 ₂
D2
D2 ₃
5 G2
4 _S2
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2008
1
October, 2008 − Rev. 2
Publication Order Number:
NTLJD2104P/D