NTGS4111P_14 Datasheet, PDF (1/6 Pages) ON Semiconductor – Power MOSFET

NTGS4111P, NVGS4111P
Power MOSFET
−30 V, −4.7 A, Single P−Channel, TSOP−6
Features
• Leading −30 V Trench Process for Low R_DS(on)
• Low Profile Package Suitable for Portable Applications
• Surface Mount TSOP−6 Package Saves Board Space
• Improved Efficiency for Battery Applications
• NV Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
• Pb−Free Package is Available
Applications
• Battery Management and Switching
• Load Switching
• Battery Protection
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
−30
V
Gate−to−Source Voltage
V_GS
±20
V
Continuous Drain Cur-
Steady T_A = 25°C
I_D
rent (Note 1)
State _{TA = 85°C}
−3.7
A
−2.7
t ≤ 5 s T_A = 25°C
−4.7
Power Dissipation
(Note 1)
Steady T_A = 25°C P_D
State
1.25 W
t ≤5 s
2.0
Continuous Drain Cur-
Steady T_A = 25°C
I_D
rent (Note 2)
State _{TA = 85°C}
Power Dissipation
(Note 2)
T_A = 25°C P_D
−2.6
A
−1.9
0.63 W
Pulsed Drain Current
tp = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
I_DM
−15
A
T_J,
−55 to °C
T_STG
150
I_S
−1.7
A
T_L
260
°C
THERMAL RESISTANCE RATINGS
Rating
Symbol Max Unit
Junction−to−Ambient – Steady State (Note 1) R_qJA
100 °C/W
Junction−to−Ambient – t ≤ 5 s (Note 1)
R_qJA
62.5
Junction−to−Ambient – Steady State (Note 2) R_qJA
200
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface−mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
2. Surface−mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.006 in sq).
http://onsemi.com
V_(BR)DSS
−30 V
R_DS(on) TYP
38 mW @ −10 V
68 mW @ −4.5 V
P−Channel
1256
I_D MAX
−4.7 A
3
4
1
TSOP−6
CASE 318G
STYLE 1
MARKING DIAGRAM &
PIN ASSIGNMENT
Drain Drain Source
654
XX M G
G
123
Drain Drain Gate
XX
= Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information ion page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 4
Publication Order Number:
NTGS4111P/D