NTD78N03R Datasheet, PDF (1/8 Pages) ON Semiconductor – Power MOSFET 25 V, 85 A, Single N−Channel, DPAK

NTD78N03R
Power MOSFET
25 V, 85 A, Single N−Channel, DPAK
Features
• Low R_DS(on) to Minimize Conduction Losses
• Optimized Gate Charge to Minimize Switching Losses
• Pb−Free Packages are Available
Applications
• VCORE Applications
• DC−DC Converters
• Optimized for Low Side Switching
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
V_DSS
25
V
Gate−to−Source Voltage
Continuous Drain
Current (R_qJA) (Note 1)
Power Dissipation
(R_qJA) (Note 1)
V_GS
T_A = 25°C
I_D
T_A = 85°C
T_A = 25°C
P_D
"20
V
14.7
A
11.4
2.3
W
Continuous Drain
T_A = 25°C
I_D
Current (R_qJA) (Note 2) _{Steady TA = 85°C}
Power Dissipation
State _{TA = 25°C}
P_D
(R_qJA) (Note 2)
11.3
A
8.8
1.4
W
Continuous Drain
Current (R_qJC)
T_C = 25°C
I_D
T_C = 85°C
85
A
66
Power Dissipation
(R_qJC)
T_C = 25°C
P_D
76.9
W
Pulsed Drain Current
t_p = 10 ms
I_DM
98
A
Current Limited by Package
T_A = 25°C I_DmaxPkg
32
A
Operating Junction and Storage Temperature T_J, T_stg −55 to °C
175
Source Current (Body Diode)
Drain to Source dV/dt
I_S
dV/dt
77
A
8.0 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (V_DD = 24 V, V_GS = 10 V,
L = 5.0 mH, I_L(pk) = 5.5 A, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
E_AS
75
mJ
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
http://onsemi.com
V_(BR)DSS
25 V
R_DS(on) TYP
5.0 @ 11.5 V
7.5 @ 4.5 V
D
I_D MAX
85 A
N−Channel
G
S
4
4
4
12
3
CASE 369C
DPAK
(Bend Lead)
STYLE 2
1
2
3
CASE 369D
DPAK
(Straight Lead)
STYLE 2
1 ₂₃
CASE 369AC
3 IPAK
(Straight Lead)
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
1
Gate
23
Drain ^Source
1
Gate
Y
= Year
3
2 ^Source
Drain
WW = Work Week
78N03R= Device Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
August, 2006 − Rev. 4
Publication Order Number:
NTD78N03R/D