NTD4960N Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET 30 V, 55 A, Single N−Channel, DPAK/IPAK

NTD4960N
Advance Information
Power MOSFET
30 V, 55 A, Single N−Channel, DPAK/IPAK
Features
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Three Package Variations for Design Flexibility
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• CPU Power Delivery
• DC−DC Converters
• Recommended for High Side (Control)
MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R_qJA
(Note 1)
T_A = 25°C
T_A = 85°C
Power Dissipation
R_qJA (Note 1)
Continuous Drain
Current R_qJA
(Note 2)
Power Dissipation
R_qJA (Note 2)
Continuous Drain
Current R_qJC
(Note 1)
T_A = 25°C
Steady
State
T_A = 25°C
T_A = 85°C
T_A = 25°C
T_C = 25°C
T_C = 85°C
Power Dissipation
R_qJC (Note 1)
Pulsed Drain
Current
T_C = 25°C
t_p=10ms T_A = 25°C
Current Limited by Package
T_A = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain−to−Source Avalanche
Energy (T_J = 25°C, V_DD = 50 V, V_GS = 10 V,
I_L = 13 A_pk, L = 1.0 mH, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
V_DSS
V_GS
I_D
P_D
ID
P_D
I_D
P_D
I_DM
I_DmaxPkg
T_J,
T_STG
I_S
dV/dt
EAS
T_L
30
±20
11.1
8.0
1.68
8.9
6.4
1.07
55
40
35.71
137
45
−55 to
+175
29.7
6
84.5
260
V
V
A
W
A
W
A
W
A
A
°C
A
V/ns
mJ
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
http://onsemi.com
V_(BR)DSS
30 V
R_DS(ON) MAX
8.0 mW @ 10 V
12.7 mW @ 4.5 V
D
I_D MAX
55 A
G
S
N−CHANNEL MOSFET
4
4
4
12
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
1 ₂₃
1
23
CASE 369AC CASE 369D
3 IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 ^Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y
= Year
WW = Work Week
4960N = Device Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
1
August, 2009 − Rev. P1
Publication Order Number:
NTD4960N/D