NTD4910N Datasheet, PDF (1/8 Pages) ON Semiconductor – Power MOSFET 30 V, 37 A, Single N−Channel, DPAK/IPAK

NTD4910N
Power MOSFET
30 V, 37 A, Single N−Channel, DPAK/IPAK
Features
• Low R_DS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices
Applications
• CPU Power Delivery
• DC−DC Converters
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (R_qJA)
(Note 1)
V_DSS
30
V
V_GS
"20
V
T_A = 25°C
I_D
11.2
A
T_A = 100°C
7.9
Power Dissipation
(R_qJA) (Note 1)
Continuous Drain
Current (R_qJA)
(Note 2)
Power Dissipation
(R_qJA) (Note 2)
Continuous Drain
Current (R_qJC)
(Note 1)
T_A = 25°C
P_D
T_A = 25°C
I_D
Steady T_A = 100°C
State
T_A = 25°C
P_D
T_C = 25°C
I_D
T_C = 100°C
2.6
W
8.2
A
5.8
1.37 W
37
A
26
Power Dissipation
(R_qJC) (Note 1)
T_C = 25°C
P_D
27.3 W
Pulsed Drain Current t_p=10ms T_A = 25°C
I_DM
152
A
Current Limited by Package
T_A = 25°C I_DmaxPkg
60
A
Operating Junction and Storage Temperature T_J, T_stg −55 to °C
175
Source Current (Body Diode)
Drain to Source dV/dt
I_S
dV/dt
23
A
7.0 V/ns
Single Pulse Drain−to−Source Avalanche
E_AS
25.3 mJ
Energy (T_J = 25°C, V_DD = 50 V, V_GS = 10 V,
L = 0.1 mH, I_L(pk) = 22.5 A, R_G = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
http://onsemi.com
V_(BR)DSS
30 V
R_DS(on) MAX
9.0 mW @ 10 V
13 mW @ 4.5 V
D
I_D MAX
37 A
N−Channel
G
S
4
4
4
12
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
1 ₂₃
1
2
3
CASE 369AD CASE 369D
IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 ^Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y
= Year
WW = Work Week
4910N = Device Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
1
June, 2009 − Rev. 0
Publication Order Number:
NTD4910N/D