NTD4302_14 Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET

NTD4302
Power MOSFET
68 A, 30 V, N−Channel DPAK/IPAK
Features
• Ultra Low R_DS(on)
• Higher Efficiency Extending Battery Life
• Logic Level Gate Drive
• Diode Exhibits High Speed, Soft Recovery
• Avalanche Energy Specified
• I_DSS Specified at Elevated Temperature
• DPAK Mounting Information Provided
• These Devices are Pb−Free and are RoHS Compliant
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery Powered Products:
i.e., Computers, Printers, Cellular and Cordless Telephones,
and PCMCIA Cards
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ T_C = 25°C
Continuous Drain Current @ T_C = 25°C (Note 4)
Continuous Drain Current @ T_C = 100°C
Thermal Resistance − Junction−to−Ambient
(Note 2)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ T_A = 25°C
Continuous Drain Current @ T_A = 100°C
Pulsed Drain Current (Note 3)
V_DSS
V_GS
R_qJC
P_D
I_D
I_D
R_qJA
P_D
I_D
I_D
I_DM
30 Vdc
±20 Vdc
1.65 °C/W
75
W
68
A
43
A
67 °C/W
1.87 W
11.3 A
7.1
A
36
A
Thermal Resistance − Junction−to−Ambient
(Note 1)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ T_A = 25°C
Continuous Drain Current @ T_A = 100°C
Pulsed Drain Current (Note 3)
R_qJA
P_D
I_D
I_D
I_DM
120 °C/W
1.04 W
8.4
A
5.3
A
28
A
Operating and Storage Temperature Range
T_J, T_stg − 55 to °C
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 30 Vdc, V_GS = 10 Vdc,
Peak I_L = 17 Apk, L = 5.0 mH, R_G = 25 W)
E_AS
722 mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8 in from case for 10 seconds
T_L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using 0.5 sq. in. drain pad size.
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
4. Current Limited by Internal Lead Wires.
http://onsemi.com
V_(BR)DSS
30 V
R_DS(on) TYP
7.8 mW @ 10 V
D
I_D MAX
68 A
N−Channel
G
S
4
4
12
3
DPAK
CASE 369C
(Surface Mount)
STYLE 2
1
2
3
IPAK
CASE 369D
(Straight Lead)
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
1
Gate
2
Drain
3
Source
12 3
Gate Drain Source
A
Y
WW
T4302
G
= Assembly Location*
= Year
= Work Week
= Device Code
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
July, 2014 − Rev. 9
Publication Order Number:
NTD4302/D